PWM output example for Stm32f4 is so confusing

[theparitt]

Posted on July 11, 2012 at 09:25

Hi, I trried to understand how to calculate pwm output from example that comes with Stm32f4-Discovery-FW1.1.0.   The file is in Project > Peripheral_Examples > TIM_PWM_Output > main.c

This is the most confusing part in comment

  

/* -----------------------------------------------------------------------

    TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles.

    

    In this example TIM3 input clock (TIM3CLK) is set to 2 * APB1 clock (PCLK1), 

    since APB1 prescaler is different from 1.   

      TIM3CLK = 2 * PCLK1  

      PCLK1 = HCLK / 4 

      => TIM3CLK = HCLK / 2 = SystemCoreClock /2

          

    To get TIM3 counter clock at 28 MHz, the prescaler is computed as follows:

       Prescaler = (TIM3CLK / TIM3 counter clock) - 1

       Prescaler = ((SystemCoreClock /2) /28 MHz) - 1

                                              

    To get TIM3 output clock at 30 KHz, the period (ARR)) is computed as follows:

       ARR = (TIM3 counter clock / TIM3 output clock) - 1

           = 665

                  

    TIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50%

    TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5%

    TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%

    TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5%

    Note: 

     SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f4xx.c file.

     Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate()

     function to update SystemCoreClock variable value. Otherwise, any configuration

     based on this variable will be incorrect.    

  ----------------------------------------------------------------------- */

My problem are; 

1) System Clock is 168 MHz  and If I need to get 28Mhz, my prescaler should be 6 - 1. Isn't it?  From this comment, prescaler is set to 3 - 1.

2) To calculate ARR value, we need to use this equation; 

ARR = (TIM3 counter clock / TIM3 output clock) - 1

Where ''TIM3 counter clock'' is   28 MHz

and ''TIM3 output clock'' is 30 Khz 

so we get ARR =  (28MHz / 30 KHz)  -1

                          = 933 - 1  

                          = 932

why they get  ARR = 655... ???????????  where is this magic number come from?

Thanks for your help

#stm32f4-pwm-output-example

[John F.]

Posted on July 11, 2012 at 10:57

TIM3CLK = HCLK / 2 =

SystemCoreClock / 2

so TIM3 is clocked at 84MHz. Consequently the prescaler value (3-1) is correct for 28MHz.

(Take a look at the device overview and clock tree diagrams to work out what's going on. Note that APBx prescaler has an odd operation where frequencies are doubled if prescaler is not 1.)

However, the example in the STM32F4 STM32F4xx_DSP_StdPeriph_Lib_V1.0.1 uses a 21MHz clock.

For a 21MHz clock the ARR value of 665 does result in about a 30kHz rate. 21MHz / 666 = 31.531...kHz.

I think someone just copied the code without thinking!

[theparitt]

Posted on July 11, 2012 at 13:13

Thanks for clarify

moodaeng