Skip to main content
ranran
Senior
February 26, 2019
Question

PSRAM controller and MDMDA

  • February 26, 2019
  • 2 replies
  • 600 views

Hello,

There seems to be some limitation about PSRAM controller and MDMA:

Although that are several channels that can be used with MDMA, there is only a single interrupt for MDMA.

If I understand correctly, it means that mdma can't be used with several PSRAM banks at the same time, and we must choose which memory will be used for the MDMA.

Is that correct ?

Another thing, we need to do dma from external nor to sram.

The problem is that the I see that external nor flash is not accessed like a memory, but need specific programming (HAL_nor_program), so my understanding is that it can;t be used for DMA.

Or can it ?

Thank you,

ranran

This topic has been closed for replies.

2 replies

Tesla DeLorean
Guru
February 26, 2019

Writing FLASH, be it internal, NAND or NOR, is always more involved and slow. It is not something you want to be tying up hardware resources with.

If the device is mapped within the processors addressable space, reading should be a relativity normal operation. The bus matrix should show the various connectivity and routing options. DMA units typically want to operate within a specific domain, and as simply as possible.

Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..
ranran
ranranAuthor
Senior
February 26, 2019

I am not sure I understand the matrix diagram.

I was using DMA (not mdma), to transfer buffer from external sram to internal sram.

I see DMA1/DMA2 in right matrix, but it does not show that DMA1/DMA2 can transfer to FMC (external sram). How can it be that it worked ?