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Greg H
Associate
November 20, 2019
Solved

Project migration from STM32F405RG to STM32G473RE

  • November 20, 2019
  • 14 replies
  • 2832 views

STM32G4 CPU speed. I am migrating a project from the STM32F405RG to the STM32G473RE. System clock frequency for both is 168MHz. I have found the code runs at about half speed on the STM32G473 and I would like to know why and how to fix it.

The STM32G473 flash is in dual bank mode and has data cache, instruction cache and prefetch enabled with 8 wait states. Will switching to single bank mode, increasing flash data width from 64 bit to 128 bit to match the STM32F405, restore the speed or is there more likely another cause? Will running the code in SRAM restore speed, as I would prefer to stay in dual bank mode.

This topic has been closed for replies.
Best answer by Greg H

Speed Problem Fixed.

By moving the main interrupt service routine to CCM RAM I obtained considerable speed improvement. Here are the computation time comparisons for the ISR:

STM32F405 from FLASH: 7 microseconds

STM32G473 from FLASH in dual bank mode: 14 microseconds

STM32G473 from CCM RAM: 6 microseconds

The code is heavy with branching so I suspect the combination of increased wait states and the reduced FLASH bus width contributed to the problem.

Thank you everyone for your comments

GH

14 replies

Greg H
Greg HAuthorBest answer
Associate
November 26, 2019

Speed Problem Fixed.

By moving the main interrupt service routine to CCM RAM I obtained considerable speed improvement. Here are the computation time comparisons for the ISR:

STM32F405 from FLASH: 7 microseconds

STM32G473 from FLASH in dual bank mode: 14 microseconds

STM32G473 from CCM RAM: 6 microseconds

The code is heavy with branching so I suspect the combination of increased wait states and the reduced FLASH bus width contributed to the problem.

Thank you everyone for your comments

GH

waclawek.jan
Super User
November 27, 2019

> The code is heavy with branching so I suspect the combination of increased wait states and the reduced FLASH bus width contributed to the problem.

That nicely rounds up the "0-wait-state execution from Flash memory," marketing lie, perpetuated in the 'F4/'G4 datasheet's very first line.

Thanks for coming back with the results. Please select your post as Best so that the thread is marked as resolved.

JW

Igor Cesko
ST Employee
April 29, 2020

The STM32G4 performance was improved - because Flash speed was re-characterized and now the Flash can operate up to 34MHz speed => 4 wait states at 170MHz. See updated reference manual RM0440. More about STM32G4 performance improvement is in https://community.st.com/s/feed/0D53W000004JX9fSAG?t=1588146144942 .

Regards

Igor

hamdi.najoua
ST Employee
April 29, 2020