Problem with using PLL and two SPI on STM32F103C8 bluepill

[SWilk.1]

Hey there,

I want to recieve two SPI signals sharing the same Enable Line, e.g. having exactly the same speed. I record them using the HAL_SPI_Receive_DMA function and count how many times SPI1 and SPI2 filled there respective Buffers.

When using HSI or HSE in system clock mux no problem occures.

When using PLLCLK the number of completed Buffers diverges dramaticly.

Problem is i need to use PLL for activating USB capabilitys

this example does not work

this example works perfectly

code NOT working:

void SystemClock_Config(void)
{
 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 
 /** Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
 /** Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 {
 Error_Handler();
 }
}

code working:

void SystemClock_Config(void)
{
 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 
 /** Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
 /** Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 {
 Error_Handler();
 }
}

Does anyone have an idea where the error is coming from?

And how to circumvent it?

Thank you!

[berendi]

Can you post the contents of the SPI peripheral registers both in the working and non-working case?

[SWilk.1]

Ja sure:

Works:

broken:

[SWilk.1]

the only difference in SR betwen 0x43 and 0xc3 is the BSY flag

[TDK]

What is your SPI clock rate? Do things change if you reduce this rate?

How are you calling the SPI calls? Better be in DMA/circular if you want them synced forever in slave mode.

[SWilk.1]

the incoming clock rate is ~800kHz

the SPI is configured in Slave, receive only mode

I use the standart HAL_SPI_RECEIVE_DMA Function

i decided against the circular mode for beeing able to use two different Buffers with "metadata" attached at the beginning end end of every buffer. Is it nececerry to use circular mode?

[TDK]

> Is it nececerry to use circular mode?

If you can't control when the master sends data, then yes. What do you think will happen if the master is sending data between when one HAL_SPI_RECEIVE_DMA completes but the next one hasn't yet started? Might work okay if this duration is less than half of a clock cycle, but I doubt you can do that speed with HAL.

[berendi]

I have no idea yet, the SPI settings should be good up to 1 or 2 MHz.

The problem might go away if you set up the PLL to 48 MHz required by USB.

It is not necessary to use circular mode if there is enough time between the data transfers to process the buffers.