Problem with SPI_SLAVE_DMA transmision

[egywell]

Posted on June 11, 2018 at 18:29

hi st

I have problem using spi slave with dma

i use stm32f746 as slave to transmit data to master pc 

i send for test fixed frame start with check char ''$>'' to sync timing then slave should send 12 bytes ( 1-12)

problem many times i got error that frame sent upto middle correct then fixed byte to end and in next frame slave send other frame missing from previous frame and continue with fixed byte for ever as much as master send clock

[T J]

Posted on June 12, 2018 at 01:04

are you using the DMA ?

the DMA buffer must be left alone until it completes.

then you can reset data within the buffer.

[egywell]

Posted on June 12, 2018 at 11:25

IMPORTANT NOTICE

the bad frame start with MISO high once start communication ( once nss set low by master) which mean that slave say to master I'm not ready and that good option to make sync 

normal frames start with MISO low 

why and how this happen ?? what does that mean really ?