Problem with QSPI and external FLASH

[Gregory3]

Hello!

I'm using a custom board with STM32F767 and external Flash memory connected to the QSPI (MX25L12835F).

I want to create a simple test, where I read and write some data into the external Flash.

In the first shot I want to use the normal SPI mode to:

1. Readout the Manufacturer & Part ID
2. Set the Write Enable Bit in the Status Register
3. Readout the Status Register to check if the Write Enable Bit was set.

So, the first setp (1.) is working fine. I'm getting correct data after reading out the Flash ID.

But when I write to the Status Register and then read out the content, then nothing is changed. My expectation is that the WEL bit will change it's state to 1.

Here the code from the main:

 //Readout the manufacturer and device ID
	sCommand.InstructionMode 	 = QSPI_INSTRUCTION_1_LINE;
	sCommand.Instruction 		 = READ_JEDEC_ID_CMD;
	sCommand.AddressMode 		= QSPI_ADDRESS_NONE;
	sCommand.AlternateByteMode	= QSPI_ALTERNATE_BYTES_NONE;
	sCommand.DataMode			= QSPI_DATA_1_LINE;
	sCommand.DummyCycles		 = 0;
	sCommand.Address			 = 0;
	sCommand.DdrMode			 = QSPI_DDR_MODE_DISABLE;
	sCommand.SIOOMode			= QSPI_SIOO_INST_EVERY_CMD;
	sCommand.NbData				= 3;
 HAL_QSPI_Command(&hqspi, &sCommand, 1000);
 HAL_QSPI_Receive(&hqspi, ID_REG, 1000);
 
 //Set the write enable bit
	sCommand.InstructionMode 	 = QSPI_INSTRUCTION_1_LINE;
	sCommand.Instruction 		 = WRITE_ENABLE_CMD;
	sCommand.AddressMode 		= QSPI_ADDRESS_NONE;
	sCommand.AlternateByteMode	= QSPI_ALTERNATE_BYTES_NONE;
	sCommand.DataMode			= QSPI_DATA_1_LINE;
	sCommand.DummyCycles		 = 0;
	sCommand.Address			 = 0;
	sCommand.DdrMode			 = QSPI_DDR_MODE_DISABLE;
	sCommand.SIOOMode			= QSPI_SIOO_INST_EVERY_CMD;
	sCommand.NbData				= 0;
 HAL_QSPI_Command(&hqspi, &sCommand, 1000);
 HAL_Delay(200);
 //From now on the ext. FLASH will accept write commands
 
 //Readout the status register
	sCommand.InstructionMode 	 = QSPI_INSTRUCTION_1_LINE;
	sCommand.Instruction 		 = READ_STATUS_REG_CMD;
	sCommand.AddressMode 		= QSPI_ADDRESS_NONE;
	sCommand.AlternateByteMode	= QSPI_ALTERNATE_BYTES_NONE;
	sCommand.DataMode			= QSPI_DATA_1_LINE;
	sCommand.DummyCycles		 = 0;
	sCommand.Address			 = 0;
	sCommand.DdrMode			 = QSPI_DDR_MODE_DISABLE;
	sCommand.SIOOMode			= QSPI_SIOO_INST_EVERY_CMD;
	sCommand.NbData				= 1;
 HAL_QSPI_Command(&hqspi, &sCommand, 1000);
 HAL_QSPI_Receive(&hqspi, Status_Reg, 1000);

So the Status_Reg never changes from the initialized state 0.

Thank you for any hint!

Regards,

Gregor

[underpickled]

I'm having a very similar problem. I wonder if you can see if we're seeing the same issue. When I put a logic analyzer on the spi lines, I see a transmission of the write enable command (0x06) followed by an extra byte of 0x00 before the CS line goes high. I believe this extra byte is causing the command to fail. I'm on an STM32L452.

[Gregory3]

Ok, I will connect a scope to the ext Flash and check if the additional byte will be sent. I will let you know.

MOOC - External QSPI loader how to

[Gregory3]

Ok, now I solved the problem.

It was this line in the code for the Write Enable Command:

	sCommand.DataMode			= QSPI_DATA_1_LINE;

If the command shall be sent without any "empty" bytes, then this shall be changed to:

	sCommand.DataMode			= QSPI_DATA_NONE;

No it works.

Regards!

[underpickled]

My command is already set up that way... Very strange. I'm glad your issue is resolved though.​