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diego239955_st
Associate
March 20, 2010
Question

Possible bug in AN3109

  • March 20, 2010
  • 3 replies
  • 776 views
Posted on March 20, 2010 at 09:52

Possible bug in AN3109

    This topic has been closed for replies.

    3 replies

    Tesla DeLorean
    Guru
    May 17, 2011
    Posted on May 17, 2011 at 13:44

    http://www.st.com/stonline/products/support/micro/files/an3109.zip

    The problem is that the code in the application note is ILLUSTRATIVE, it is not a general solution which can be dropped into your application. For example it disables DMA once it interrupts instead to reinitializing it for the next burst of data.

    I generally agree that the DMA Rx data should be double buffered, and set up as a circular transfer, too address a couple of latency issues.

    -Clive

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    damh
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:44

    This code is risky.

    I don't see the initialization of the counters and DMA. DMA transfer size/counter should be below or equal 250.

    Is RxBuffer2_SW used for more than one DMA packet? If not, why are there 2 counter variables RxCounter1 and RxCounter?

    Why do you use copy instead of changing the DMA buffer? Changing DMA buffer is easier and faster ;)
    marbel
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:44

    Hi,

    I have also been looking at the AN3109.  My goal is simply to remove as many interrupts as possible from my system. When I run the system, it generates interrupts periodically and is not at all depending on transfers on my UART TX line. I would have wished for a solution where the rising edge starts and resets the timer. Am I missing something here?

    // Martin