PLLCLK not working for STM32U575ZIT6 based custom board

[Agour.1]

Hi,

I have migrated from STM32L4S5ZI --> STM32U575ZIT6 for one of our custom designed board.

I am trying to configure 96MHz HCLK using Clock configuration in my *.ioc file and just toggle LEDs with a delay of 1 sec with the generated code & this logic.

My observations are as follows:

1. Board Works (LED toggles perfectly every second) with HSI 16 MHz.
2. Board works with HSE 48MHZ external oscillator without involving PLL. But I need to change the voltage level to 4 as shown in image attached.
3. Board does not work with 48MHz MSIS
4. Board does not work with 96MHz PLLCLK with input as HSE clock
5. Board does not work with 96MHz PLLCLK with input as HSI clock

for all these cases images are attached. I have also attached my schematics and relevant code snippet and also the project workspace.

Upon survey I found that such issues comes when VDDA & VSSA are not connected / decoupled. Upon probing my board I confirmed both VDDA & VSSA are perfect 3.3V & GND respectively.

Please suggest possible solutions at the earliest.

[Agour.1]

in above thread I was unable to attach both

[Agour.1]

Today we got the actual solution to the problem.

While creating a new project we need to select Timebase Source as SYSTICK under System core option in .ioc file.

After doing so, I was able to make the clock work properly.

IDE must have thrown an error or warning in this case. I hope this issue will be addressed in upcoming versions of STM32cubeide

[Piranha]

Write code yourself and there will not be such a ridiculous problems, because you will actually learn how things work.