Solved
Hello
This world should be true since the failures caused by EMC interference usually result in PC lost, system clock drop or device reset and the design of the HW+SW have to be hardened in the way to deal with these interferences and to allow system self-recovery if such failures occur.
These events can be eventually "emulated" by stopping oscillation of external Xtal (if such is used as a source for system clock) or triggering reset by low level on NRST pin.
Best Regards.
STTwo-32
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