PDR_ON errata on LQFP100 for STM32F4

[jpeacock2399]

Posted on August 19, 2013 at 23:21

A warning so no one else will get caught by this.  On the original STM32F4 design docs pin 99 on LQFP100 is shown as RFU or PDR_ON, and diagrams show it can be connected to Vdd.  The gotcha is this only applies to rev Z parts, first release.  Read on if you got some Z parts for prototyping.

A later errata (and I missed this) changes pin 99 to Vss for rev A parts, after rev Z.  If the PCB connects pin 99 to Vdd you get a power supply short.  Just got a batch of PCBs back with rev A parts installed, all have Vdd shorted to ground.

It may also casue a problem if you use an external reset and connect it to pin 99 as a PDR_ON pin (as shown on some diagrams) to enable the power supervisor.  It will pull down the external reset to Vss.  PDR_ON has been removed from LQFP100 packages.

The change doesn't apply to 144 and 176 pin parts.  I believe the 64 pin part doesn't have an RFU pin.

  Jack Peacock

#lqfp100-stm32

[jpeacock2399]

Posted on August 19, 2013 at 23:28

Got it backwards.  Rev Z parts are Pin 99 to Vss, rev A parts are Pin 99 as RFU or PDR_ON.

  Jack Peacock

[waclawek.jan]

Posted on August 20, 2013 at 08:37

A similar change occured recently on the LQFP176 package: pin 48, which used to be VSS (GND) is now BYPASS_REG; so those who design against the latest rev4 datasheet and receive older chips might get caught.

AFAIK there's no related change in the silicon revision and no errata item, only the datasheet has changed in this regard between rev3 and rev4. Funnily, this change is not mentioned in the revision history (OTOH, it says ''Updated pin 36 signal in Figure 15: STM32F40x LQFP176 pinout'', while pin 36 on that package did *not* change...)

JW

[digital_dreamer]

Posted on September 03, 2013 at 04:05

I just stumbled onto this issue. I was attempting to tie PDR_ON up to VDD, so that the VBAT switch would work correctly when powered off. Instead, I got the short when I plugged in the USB power. Ouch! Thankfully, the USB controller on my hackintosh switched it off immediately.

Now, what am I to do regarding the high RTC current draw on theLQFP100 package? The RTC draws 90mA continuously -- 100x more than expected.

I'm already familiar with this post, I think:

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Vdd%20being%20held%20at%7V%20with%20backup%20battery%20fitted&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=449

MAJ

[digital_dreamer]

Posted on September 03, 2013 at 04:06

Double post -- sorry.

[John F.]

Posted on September 03, 2013 at 10:28

Jan,

Looking at the STM32F405xx, STM32F407xx Data Sheet DocID022152 Rev 4 and

only looking at the LQFP176 package

.

[Figure 15. STM32F40x LQFP176 pinout] does identify Pin 48 as BYPASS_REG as does [Table 7. STM32F40x pin and ball definitions] although the [Table 3. Regulator ON/OFF and internal reset ON/OFF availability] appears to differ!

For anyone whose design grounds pin 48 (it was VSS) note that, ''On packages embedding the BYPASS_REG pin, the regulator is enabled by holding BYPASS_REG low. On all other packages, the regulator is always enabled.'' In other words, the regulator was enabled and with the newer parts still will be - no changes needed. Only newer parts support turning off the regulator.

Also note that pin 36 has been renamed VDDA where it was VDD. However, ''It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and power-down operation.'' ... so the likelihood is that it would be connected to VDD in your design and still would be (although presumably the idea is to use some noise rejection or additional decoupling on the pin).