Onje Spi NSS and several peripherals, problems

[LMI2]

If I use SPI NSS as a main chip select and IO pins to select individual devices, do I get SW problems with CubeMX for instance or does STM32F7** HW support it.

[waclawek.jan]

What do you mean by "main chip select"? Post a sketch of your system, indicating master(s) and slaves.

JW