ns timing of sequence of external events

[NWark.1]

Hello - I am looking for a solution that can time a sequence of external events (combination of rising and falling edges). The events can occur as close as every ~10ns. The max number of events in the sequence is of the order of 100. After this there can be a long delay. I am looking for <2ns resolution on the timestamps. Can you suggest a solution for this? Thanks!

[Tesla DeLorean]

Going to be hard pressed to achieve with a General Purpose MCU.

TI has an interesting ToF measurement chip, but that's probably not going to be good for a stream of pulses.

Perhaps look at what people use for pattern buffers on logic-analyzers, something that can sample with high resolutions, and can be pulled out and measured at a more leisurely pace.

Other than that perhaps some custom hw, using an FPGA, CPLD, etc.

[NWark.1]

Thanks for the suggestions. I will follow up on them.

I was hoping that the STM32H7 with 480MHz clock speed might be able to get close to this. I noticed the high resolution timer resolution is 2.1ns.

[NWark.1]

As a follow up, I noticed that the STM32F334 seems to have a resolution of 217ps on the high resolution timer. Is this a possible option for timing multiple events as long as I can read the timer capture register before the next event occurs (10+ns later)?

[berendi]

The capture resolution is still the same as the timer clock, 144 Mhz i.e. 6.94 ns.

From the reference manual

The high-resolution is not available for the following features

• Timer counter read and write accesses

• Capture unit

[NWark.1]

Thanks for clarifying.

[berendi]

HRTIM on the STM32H74x/H75x series comes close to your requirements.

There are capture counters with 480 MHz resolution, i.e. 2.083 ns. I have some doubts though, the external triggers might be sampled at 240 MHz only, and DMA might not be able to store the capture values quickly enough, but I might be wrong, so you can give it a try.

Another idea, if you can find a fast external serial to parallel converter that can convert the input to 16 parallel outputs, which can then be connected to a 16 bit GPIO port of the MCU, where a couple of hundred kilobytes worth of captured samples can be stored and examined at the end of the burst. I don't think that the MCU could provide all the clocks needed for that, so you'd probably need some external circuitry for that. I think it could work with the MCU sampling the parallel port at maybe every 15 MCU clock cycles.

[NWark.1]

Thanks for the suggestions, that is very helpful.