Nonsense in STM32L452E Reference Manual, RM0394 Rev 4 - 2018!!
Cross-references the wrong register, should be RCC_BDCR
RM0394 Reset and clock control (RCC) Pg 247
6.2.6 LSE clock
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External source (LSE bypass)
In this mode, an external clock source must be provided. It can have a frequency of up to 1 MHz. You select this mode by setting the LSEBYP and LSEON bits in the AHB1 peripheral clocks enable in Sleep and Stop modes register (RCC_AHB1SMENR). The external clock signal (square, sinus or triangle) with ~50 % duty cycle has to drive the OSC32_IN pin while the OSC32_OUT pin can be used as GPIO. See Figure 14.
