Non linearity in ADC Measurement using STM32F051R4T6TR IC

[Amal Babu]

Hai,

i have been into designing a solar inverter using STMF051R4 series IC for past few years. Presently we are working

on ADC Measurement with DC voltage.The problem we are facing now is we not able to get a linearity in measurement of the dc voltage at the adc pins of the STM32 ic.We are getting different ratio for the different voltage ranges when we linearly increase the voltage with a constant difference .Can you please suggest me what kind of problem am i facing with the measurement of the voltages.Specifically can someone help me with the error i am facing right now.

I have also tried using low pass filter but couldnt find much difference in reading the values at the adc pins of the ic.

[AvaTar]

The ADC peripheral is pretty much the same on most STM32 MCUs, not changed significantly for years. And it delivers what the datasheet specifies.

Most probably the problem is either your interfacing circuitry, the configuration code, or both.

[Amal Babu]

Here i am using DMA for ADC reading,i have attached the configuration of both DMA and ADC below ,please go through the configuration and help me if i have made any mistakes :

void DMA_config()

{

   RCC->AHBENR |= RCC_AHBENR_DMA1EN;

   DMA1_Channel1->CPAR = (uint32_t) (&(ADC1->DR));

   DMA1_Channel1->CMAR = (uint32_t)(ADC_array);

   DMA1_Channel1->CNDTR = 1;

   DMA1_Channel1->CCR |= DMA_CCR_MINC | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_TEIE | DMA_CCR_CIRC | DMA_CCR_PL_0;

   DMA1_Channel1->CCR |= DMA_CCR_EN;

}

void adc_configuration()

{

   GPIOC->MODER |= BIT(9) | BIT(8);

   GPIOA->MODER |= BIT(7)| BIT(6);

   ADC1->CR &= ~ADC_CR_ADEN;

   RCC->APB2ENR |= RCC_APB2ENR_ADCEN;

   ADC1->CFGR2 |= ADC_CFGR2_CKMODE_0;

   ADC1->SMPR |= 0X00000007;

   ADC1->CFGR1 |= ADC_CFGR1_CONT | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN | ADC_CFGR1_RES_0| ADC_CFGR1_SCANDIR;

   ADC1->CFGR1 &= ~(ADC_CFGR1_ALIGN | ADC_CFGR1_SCANDIR);

   ADC1->SMPR   &= ~ADC_SMPR_SMP;

   ADC1->CHSELR |= ADC_CHSELR_CHSEL4 ;

   ADC1->CR |= ADC_CR_ADEN;

   while(!(ADC1->ISR & ADC_ISR_ADRDY));

   ADC1->CR |= ADC_CR_ADSTART;

}

[AvaTar]

How does the hardware at the ADC inputs look like ?

VDDA really stable ?

[Amal Babu]

ADC input hardware is as shown below for measuring voltages at range of 350v dc

[Amal Babu]

..

[Amal Babu]

..

[Amal Babu]

The above given is the power supply configuration given to the stm ic

[AvaTar]

> ADC input hardware is as shown below for measuring voltages at range of 350v dc

I can't see anything below. Guess you need to klick the "Image" icon and upload an image.

Simple copy and paste doesn't really work with this forum.

Anyway, 350V sounds like a significant amount of adaption and galvanic isolation circuitry.

Try to validate both separately. Presenting low-impedance fixed voltages to the ADC inputs should yield reasonable results.

Have you measured the transfer behavior of said adaption circuitry with a reference voltmeter ?

[AvaTar]

I'm not a hardware guy, but 4.7uF at the opamp output /ADC input seems an awful lot to me.

[T J]

Is that a battery ?

remove C9 from the battery..

it looks a very simple circuit.

the OPAMP wont like going anywhere near the rails. @Avatar has eluded to this.

you will find that different opamps will give you different results at the rails.

if you could use a +/- 5v supply, then the opamp will be ok,

then you need input protection diodes.. to stop the -5V blowing up the processor...

otherwise choose a Rail to Rail opamp from Analog Devices.. and pay for the good one...