No uart activity stm32f105

[stenasc]

Posted on June 30, 2014 at 10:32

Hi,

On our board which contains stm32f105R8, I can see no usart1 activity. I'ved used the supplied ST printf example to configure usart1.

Our board has an external 8MHz crystal and I've seen it mentioned that the CL series expects an external 25Mhz crystal by default, so that may be the issue. I have set the XTAL clock value to be 8MHz in uVision4 tools hoping that would solve our problem but no luck.

Does anyone have the correct settings for stm32f10x.h in order to use the external 8 Mhz crystal to generate a system clock of 48 Mhz?

Thank you

Bob

[Tesla DeLorean]

Posted on July 07, 2014 at 18:32

Not sure what's going on here. There are later version of Keil uv 4.7x that had some reported issues with volatile variables.

The clocking settings within v3.5.0 of the F1 firmware library are typically handled in SystemInit(), which is called prior to main()

I wouldn't permit main() to exit.

In the debugger where does the code appear to be stuck or end up?

[Tesla DeLorean]

Posted on July 07, 2014 at 19:09

I might do it like this:

/*
STM32F107VC - USART1 + SysTick demo - [e-mail]
STM32F10x_StdPeriph_Lib_V3.5.0
Startup : startup_stm32f10x_cl.s
System : system_stm32f10x.c
Project defines : USE_STDPERIPH_DRIVER, STM32F10X_CL
HSE_VALUE must reflect external crystal
*/
#include ''stm32f10x.h''
#include <
stdio.h
>
#include <
stdlib.h
>
//****************************************************************************
void USART1_Configuration(void)
{
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIO and USART1 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_USART1, ENABLE);
/* Configure USART Tx as alternate function push-pull */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* Configure USART Rx as input floating */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* USARTx configured as follow:
- BaudRate = 115200 baud
- Word Length = 8 Bits
- One Stop Bit
- No parity
- Hardware flow control disabled (RTS and CTS signals)
- Receive and transmit enabled
*/
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
/* USART configuration */
USART_Init(USART1, &USART_InitStructure);
/* Enable USART */
USART_Cmd(USART1, ENABLE);
}
//****************************************************************************
volatile int SystemTick = 0;
#define TICK_RATE 1 // in milliseconds
void SysTick_Handler(void)
{
// Free running millisecond counter for timeouts
SystemTick += TICK_RATE; // 1 ms tick count
}
//****************************************************************************
int Sleep(int Delay)
{
int Start, Current;
Start = SystemTick;
do
{
// __WFI(); // Wait for interrupt - kills debugger if low power kicks here
Current = SystemTick;
}
while((Current - Start) < 
Delay
);
return(Current - Start); // Estimate of time past
}
//****************************************************************************
int main(void)
{
RCC_ClocksTypeDef RCC_Clocks;
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
file (startup_stm32f10x_xx.s) before to branch to application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f10x.c file
*/
RCC_GetClocksFreq(&RCC_Clocks);
if (SysTick_Config(RCC_Clocks.SYSCLK_Frequency / 1000))
{
/* Capture error */
while (1);
}
/* Add your application code here
*/
printf(''Hello World!
'');
while(1)
{
Sleep(5000);
puts(''HELP!'');
}
while(1); /* Infinite loop */
}
//****************************************************************************
// Hosting of stdio functionality through USART1
//****************************************************************************
#include <rt_misc.h>
#pragma import(__use_no_semihosting_swi)
struct __FILE { int handle; /* Add whatever you need here */ };
FILE __stdout;
FILE __stdin;
int fputc(int ch, FILE *f)
{
while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET);
USART_SendData(USART1, ch);
return(ch);
}
int fgetc(FILE *f)
{
char ch;
while(USART_GetFlagStatus(USART1, USART_FLAG_RXNE) == RESET);
ch = USART_ReceiveData(USART1);
return((int)ch);
}
int ferror(FILE *f)
{
/* Your implementation of ferror */
return EOF;
}
void _ttywrch(int ch)
{
while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET);
USART_SendData(USART1, ch);
}
void _sys_exit(int return_code)
{
label: goto label; /* endless loop */
}
//****************************************************************************
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf(''Wrong parameters value: file %s on line %d

'', file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
//****************************************************************************

[stenasc]

Posted on July 08, 2014 at 00:45

Thanks Clive,

I'll try this tomorrow.

Regards

Bob

[stenasc]

Posted on July 09, 2014 at 01:55

Hi Clive,

I tried this and it was the same..it didn't work. I checked the SysTick registers after configuration and I got the following...(in decimal)

SysTick Control Register = 7

SysTick Reload Value = 47999

SysTick Current value (starts at 47998 and updates contantly when the app is run. However the count is random and I can make no sense of whether it is meant to be up or down)

SysTick Calibration Value = 1073750824

SystemTick never increments when app is running so the delay never occurs. I'm lost at this stage. The SysTick Handler is at the correct location in the vector table, so I really don't know what could be causing this.

Regards

Bob

[Tesla DeLorean]

Posted on July 09, 2014 at 03:04

Not got much idea about what's going on with your system.

I'd have to take a look at the schematic, and a complete zipped up project with output files.

[stenasc]

Posted on July 09, 2014 at 12:56

Just seen this on Arm website...Our reference XTAL is 25 MHz, yet I have set core clock to be 48 MHz. That doesn't meet the X 2.5 criteria. Might explain what I'm seeing?

Bob

CLKSOURCE

0 = external reference clock.

1 = core clock.

If no reference clock is provided, it is held at 1 and so gives the same time as the core clock. The core clock must be at least 2.5 times faster than the reference clock. If it is not, the count values are Unpredictable.

[Tesla DeLorean]

Posted on July 09, 2014 at 14:43

Probably not, the external SYSTICK source on the STM32 parts is HCLK/8

[stenasc]

Posted on July 10, 2014 at 00:23

Yep you're correct Clive no difference. Only other thing I can think off is vector table address mismatch, but they look to be ok. SysTick Handler Address is specified as 0x8000420D but the map file states that its address is 0x0800420c. I think this is OK though. The contents of SCB->VTOR are 0x08003000. Does that seem correct?

Bob

[Tesla DeLorean]

Posted on July 10, 2014 at 01:52

The ODD addressing of the routines in memory reflects that they are 16-bit Thumb code rather than 32-bit ARM.

The +0x3000 offset for the vector table suggests you have some other boot loader app, which might well be complicating the discussion here. If you are building the project with a base of 0x08000000 this could well be a problem.

[stenasc]

Posted on July 10, 2014 at 09:38

Hi Clive,

I'm using the startup_stm32f10x_cl.s as the bootloader. Nothing else. Could you elaborate a little more on the offset issue and what should I use as the base address?

 

Regards

Bon