My vdd readout is high. Using Vrefint ADC channel.

[Henrik Sandaker Palm]

Posted on January 04, 2017 at 19:51

Hi,

My vdd calculates to 3.49V but I measure it to 3.30V with a voltmeter.

The Vrefint calibration value at 0x1FFFF7BA is 1550.

The ADC value I read is 1465, fluctuating +/- 1.

Calculation is 3.3V * VrefintCalValue / AdcValue = 3.49V

I'm guessing it's my adc read value that is off, not the factory calibration value?

MCU is STM32F042G6Ux. ADC code is done in CubeMX.

ADC is clocked with a prescaler of /4 and sampletime is 239.5 cycles. So all signals should have plenty of time to settle between samples.

Code is inside this link ->

http://pastebin.com/G7bSzfyf

[Henrik Sandaker Palm]

Posted on January 04, 2017 at 20:47

Getting somewhere. Found this piece of code inside the HAL:

/**

* @brief Perform an ADC automatic self-calibration

* Calibration prerequisite: ADC must be disabled (execute this

* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).

* @note Calibration factor can be read after calibration, using function

* HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).

* @param hadc: ADC handle

* @retval HAL status

*/

HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)

.. and I used it in the ADC init routine.

Now I'm reading 1526, which is much nearer the calibration value and vdd calculates to 3.35V.

That is only 50mV offset from reality. Can I expect to get any closer than this?

[Henrik Sandaker Palm]

Posted on January 15, 2017 at 21:48

Funny thing is that all though vdd readout is high (some 50mV off), other ADC readings that use the corrected vdd reading is close to spot on (1 or 2 mV off).

[Scott Dev]

Posted on March 05, 2017 at 15:04

Hi

   I am looking at this in interest as I am new to STM32 and am starting to look at the A/D side. I am concerned with the accuracy of the a/d as the chip I am using doesnt have VREF+ input.  Hope you dont mind me asking ,  in your calculation above, is the 3.3v because that is what you are reading on your volt meter, or is? I am thinking of running from a 3.6v battery , so the voltage will slightly drop as time goes by, and want to keep the same accuracy. Can anything be done with the VREFINT and  keep the accuracy?

Many Thanks

Scott

[Tesla DeLorean]

Posted on March 05, 2017 at 16:24

Expect that the calibration value is computed from a sample and current temperature. Don't expect it to come from long term thermal testing, or over a wide range of voltage or temperature. You might want to do some more thorough testing and profiling in your own test/calibration process, and over temperature. 

You could apply your own reference voltage to the part via another ADC pin during test.

The reference is nominally 1.25V, as  I recall, check the documentation for your specific part. VREF+ will be bonded to VDDA if it is not brought to it's own pin. 

[Scott Dev]

Posted on March 19, 2017 at 10:16

Hi

  I understand that the value of VREFINT at precisely 

3.3V

is stored in memory during manufacture time. I know this is a silly question, but I assume the value read in from the VREFINT to calculate the chip voltage is not like a standard voltage reference in the sense it always stays the same same value?  As if it did there would be no way of calculating the vdd.  I am planning to run the processor at 2.5v , so I assume the value of VREFINT will change accordingly so the accurate value of the vdd can be calculated?

Many thanks from a beginner on th STM32

Scott

[S.Ma]

Posted on March 05, 2017 at 19:06

Use the chip temperature measurement in the interpolated vdd calculations. I guess that when some STM32 consumes 100mA or more, the junction temperature should be compensated for possibly higher precision. If the vdd measurement need come for precise analog input measurements, then also consider an STM32 with differential input support.

[ryan nguyen]

Posted on May 30, 2017 at 03:05

I ran into the same problem, where the results of my voltage calculation for Vdda as well as other ADCs using the VREFINT are off by 5-6 mV. I solved my issue by decreasing the adc sampling rate which was 1.5 adc clock cycle to 55.5 adc clock cycle, and now it's only off by ~ 1mV. I think the reason being the adc might need more time to charge up its cap depending on the resistance of the adc line. Hope this help.

[mustafa2]

Posted on May 23, 2018 at 14:22

I read the whole post and your one sentence gave me the solution.  This was the answer that I was looking for. Thank you very much sir.

[Taras Chornenkyi]

Posted on November 13, 2017 at 12:32

Hi!

VREFINT_CAL is the result of conversion of 3.0 V by the ADC. So you should use 3.0 instead of 3.3 in you calculations.

I have the following formula in the reference manual for stm32l476:

VDDA = 3.0 V x VREFINT_CAL / VREFINT_DATA 

http://www.st.com/content/ccc/resource/technical/document/reference_manual/02/35/09/0c/4f/f7/40/03/DM00083560.pdf/files/DM00083560.pdf/jcr:content/translations/en.DM00083560.pdf