Migrate from STMF4 to STM32F7 (configuration of memory mapping and bootloader)

[elmzaiti youssef]

Posted on June 02, 2017 at 09:41

Hello ,

  I'm a trainee and my project is to migrate from stmf4xx to stm32f7xx , so i was compile the all project using stmf7xx library  on keil uvison 5 ,and fix all error due to incompatibility of these two microcontroller , and fix error of bitbanding because a stm32f7xx don't support a bitbanding instructions , now we should modify a memory mapping and bootloader , please help , i don't now how i can do it . 

Regards 

Youssef

#migrate-from-stmf4-to-stm32f7(configuration-bootloader) #migrate-from-stmf4-to-stm32f7 #migrate-from-stmf4-to-stm32f7-(configuration-of-memory)

[Imen.D]

Posted on June 06, 2017 at 00:06

Hi

youssef.elmzaiti

,

Please refer to the following documents that can help you on your project migration:

• http://www.st.com/content/ccc/resource/technical/document/application_note/73/76/21/47/ef/d0/4c/16/DM001645pdf/files/DM001645pdf/jcr:content/translations/en.DM001645pdf

  Application note Migration of microcontroller applications from STM32F42xxx/F43xxx devices to STM32F7 Series devices (section1.3 System bootloader -2.2 Memory mapping)

• http://www.st.com/content/ccc/resource/technical/document/application_note/b9/9b/16/3a/12/1e/40/0c/CD001675pdf/files/CD001675pdf/jcr:content/translations/en.CD001675pdf

  STM32 microcontroller system memory boot mode

Imen

[elmzaiti youssef]

Posted on June 07, 2017 at 08:57

Hello Imen , 

 We want to migrate our application to STM32F7xx ,the problem is we use a bitbanding to read / write the registre like GPIO ... in STMF4xx ,so in STM32F7xx there isn't a region of bitband ,so could you please suggest a solution with exemple , tutorial ...

  

[Imen.D]

Posted on June 07, 2017 at 11:37

Hi

youssef.elmzaiti

,

Your description here of the problem is not clear.

We need more details about what do you expect exactly as result.

What is the issue that you have and the problem you are facing

with

memory mapping.

You mayhave a look to these application notes that can help you:

• http://www.st.com/content/ccc/resource/technical/document/application_note/group0/bc/2d/f7/bd/fb/3f/48/47/DM00272912/files/DM002729pdf/jcr:content/translations/en.DM002729pdf

  Application note Managing memory protection unit (MPU) in STM32 MCUs,

  describes how to manage the MPU.

• http://www.st.com/content/ccc/resource/technical/document/application_note/group0/08/dd/25/9c/4d/83/43/12/DM00272913/files/DM002729pdf/jcr:content/translations/en.DM002729pdf

  Application note Level 1 cache on STM32F7 Series,describes the level 1 cache behavior and gives an example how to ensure the data coherency when using the L1-cache.

Regards

Imen

[Eduardo Alvarez]

Posted on May 19, 2018 at 15:02

Hi @elmzairi youssef,

I have one solution for you problem, you can use bit level structs. I dont know if ir is the best solution (effectiviness) but is manage like bit banding on code.

example of bit banding :

#define GPIOA_OD0 (*((__IO uint32_t*)(BITBANDING_BASE+(GPIO_BASE_OFFSET*32)+(BIT_NUMBER*4))))

�?�? In code �?�?

GPIOA_OD0=1;

example with struct :

typedef struct

{

__IO GPIO_MODER_Typedef MODER;

....

....

__IO GPIO_IDR_Typedef         IDR;

__IO GPIO_ODR_Typedef       ODR;

....

.....

}GPIO_Bits_Typedef;

typedef struct

{

__IO uint32_t OD0: 1;

__IO uint32_t OD1: 1;

__IO uint32_t OD2: 1;

...

...

...

...

__IO uint32_t OD15:1;

}GPIO_ODR_Typedef

#define GPIOA_Bits ((GPIO_Bits_Typedef*)GPIO_BASE))

�?�?- In code �?�?-

GPIOA_Bits->ODR.OD0=1