Question
MCO capability
I'm working on a board redesign due to supply chain issue with a NXP MK70 MCU. The previous design clocked both the MK70 and a Spartan 6 FPGA with an external 50MHz crystal oscillator.
The new design is using the STM32L4R9AII6 MCU -- max HSE input freq of 48MHz. I'm considering the following:
- an external 8MHz crystal oscillator driving the HSE input
- internal PLL generating a SYSCLK of 100MHz
- drive the MCO Source MUX with SYSCLK & divide its output by 2
- Use the MCO pin to drive the FPGA clock input
Questions
- Sanity check: is this a valid use of the MCO pin (or is it just handy for debug)?
- A conservatively estimated max routed length for MCO pin to FPGA clock input is 25mm. Would an external driver be recommended?
