JTAG and PA.13/14/15 in release build

Posted on May 21, 2008 at 05:31

This topic has been closed for replies.

Associate III

Posted on May 17, 2011 at 12:35

See GPIO example from Raisonance's RIDE7 (ARM kit needed)...

johnAuthor

Associate III

Posted on May 17, 2011 at 12:35

Hi,

On our small product, we must use port A 13, 14 and 15 as GPIO, inputs

with IPU, to read some switches (closed = pulled to ground).

I'm having trouble with these ports/pins, and I suspect it may be the

JTAG functionality interfering with these ports.

Please can anyone tell me exactly what I need to do to turn off JTAG,

or whatever I may need to do to get GPIO A.13-15 to work for me ?

Note - this is for release builds only, I know that if I turn off JTAG,

then I can't debug anymore.

Our CPU is the 'stm32f101t6u6' (?), which only has ports A and B on it.

Thanks,

John.

Associate III

Posted on May 17, 2011 at 12:35

see ''um0427\STM32F10xFWLib\FWLib\examples\GPIO\Example2''.This example provides a short description of how to use the JTAG IOs as standard

GPIOs and gives a configuration sequence.

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