It is ok to enable push-pull output with an external pullup to 5V?

[lastMcu]

The documentation notes that FT pins are not 5V tolerant when the output is enabled because that would produce a direct short cut between VDD and 5V.

But what happens when there is an external 5V pullup? Is it ok to use push-pull (not open drain) output because there is not a direct connection to 5V and the pullup resistor would produce a voltage drop?

It depends on the resistance value of the pullup? Or it is not allowed at all and can damage the device unless open drain output is used?

The obvious reason to use push-pull and not open drain is for the purpose of improving the raising time, without using very strong pullup resistors.

Thanks

[TDK]

You're allowed, but it would depend on the pullup value. You need to ensure the current sink doesn't exceed the limits in the datasheet.

With typical pullup values, it shouldn't be an issue.

[Uwe Bonnes]

Carefully check that analog parts are not disturbed by the injected current!

[lastMcu]

I wasn't aware about this issue. I find it in the datasheet now. Thanks for the tip.

In this case is not a problem because I'm not using ADC. And if I read the datasheet correctly, there is no injected current as long as the pin is FT 5V tolerant.

[Jack Peacock_2]

And if you are designing a battery powered product external pull-ups cause substantial rise in current consumption while idle. Push-pull output with a pull-up means an internal FET transistor in the STM32 is trying to sink or source the output in parallel with current flow from the external resistor.

Push-pull with external resistor is usually only required when you need a guaranteed condition at reset, when all GPIO pins revert to analog mode before configuration. Typically this is 100K or higher to minimize injection currents once the GPIO pin is configured and the internal FETs switched in to the circuit.

Jack Peacock

[lastMcu]

Of course. But in this case we don't control the external pullup. The pull-up is external to our design.

[Uwe Bonnes]

Also 5 Volt logic mostly always regards 3.3 V als high, 3.3 V may cause high current in the 5 Volt buffer. So external pull up may also be needed in power sensitive designs.

To get fast switching with high value pull ups, consider having a short period of Pull-Up from the Push-Pull stage active. That will get you fast to VDDIO . Then switch off the pull transistor and leave the rest of the pull up resistor.