Is this schematic right regarding the ADC clock for STM32G4xx MCUs?
I have used some time to figure out to use the ADCs for a couple of Nucleo STM32G4xx boards. In particular I liked to be able to make use of the asynchronous clock. I found out by some trials and errors to get the right RCC settings for that.
In RM0440 you got a ADC clock schematic figure 83 page 597. I have tried to enlarge this schematic a bit regarding the RCC controls like this:

Can you agree to this schematic?
These functions can help configure RCC for the other ADC clock input:
__HAL_RCC_ADC12_CLK_ENABLE() Enables clock to AHB interface
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_ADCCLK); Enables clock to PLLP
I did not find a function outside the big HAL RCC init data structure to set the bits ABCxxSEL[1:0] of RCC_CCIPR, so I did that bare metal.
