Is there no DMAMUX1 enable and reset in STM32G0?

[Uwe Bonnes]

While stm32l4r and stm32h7 have DMA1MUXEN and DMAMUX1RST in the RCC register space, I see no such definitions in STM32G0. Are these definitions missing in the headers or is there really no such functionality in STM32G0

[Imen.D]

Hello @Uwe Bonnes​ ,

In fact, the clock for DMAMUX is coupled with the one for DMA,

DMAEN and DMARST are bits which impact both DMA and DMAMUX at the same time.

Please, let me know if you need to clarify something.

Thank you for your return.

Best regards,

Imen.

[waclawek.jan]

Hi @Imen DAHMEN​  ,

this is surprising, as in all STM32 RMs, modules which have standalone chapters have also separate reset/enable bits in RCC.

Can this please be explicitly mentioned in the description of DMARST and DMAEN bits in the RCC chapter of RM0444 ?

Thanks,

Jan

[Imen.D]

Hi,

I raised your feedback and requested the update of the reference manual to had that in the bit description indeed.

Kind Regards,

Imen

[waclawek.jan]

Thanks, Imen.

Jan