Is there a method to test/simulate an STM32 SRAM Hardware Parity error on an STM32F302 Microcontroller?

[TEric]

With SRAM hardware parity checking enabled is there a way to test/simualte a RAM parity error?

Also according to ARM once the NMI handler function is called then the NMI flag is cleared until the processor reasserts the flag. Will the NMI flag remain set once a hardware parity error is detected?

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/Cihfaaha.html

[waclawek.jan]

> With SRAM hardware parity checking enabled is there a way to test/simualte a RAM parity error?

I'd say, switch on parity checking, write some data, switch off parity checking, write deliberately parity-different data to the same addresses, then switch on parity checking and read the data from those addresses.

> Will the NMI flag remain set once a hardware parity error is detected?

I'd say, no; IMO the parity checking is performed only at the moment of read from given address.

JW