Is the DMA busy until the whole FIFO is transferred in M2M DMAs?

[MMoha.3]

I'm using triple interleaved ADCs to fill a buffer (6000*16bits) in circular mode via DMA,

and I needed to know when I wanted to read the whole buffer via another DMA request and write it to a second buffer to be processed offline later would I need to stop the ADC at first so that the data is not altered when I'm reading it,

or I can just request another DMA (with higher priority) to move the whole buffer in M2M FIFO mode and set the FIFO threshold to Full, and the ADC stream would be kept busy by the M2M request so the ADC would not be able to write anything in the whole time of the M2M access?

[waclawek.jan]

Which STM32?

The M2M DMA most probably won't block DMA from ADC.

JW

[MMoha.3]

Thank you JW,

Sorry I forgot to mention, I'm using an STM32F429ZIT6,

Can you provide the documentation for your answer? Because I could not find any AN on the matter and I wanted to read further about it.

[waclawek.jan]

I don't think I'll find something like a direct answer to your particular question, but for details of working of the dual-port DMA as is on 'F4, read AN4031.

JW