Is it possible to use multiple break pins with a single advanced timer?

[galens]

I would like to use four TIM1_BKIN pins with timer 1 such that if any one of the four break inputs is active, the timer outputs are disabled. I.e. if multiple pins are configured to be TIM1_BKIN, are all of the inputs OR'd together? This would eliminate the need to externally OR the various break inputs. It would also allow the firmware to determine which break input is active, either through polling of the GPIO input register or the use of EXTI.

This is on an STM32G431. Note that this a hardware configuration question. I am not using HAL or any other ST libraries.

thanks,

galen

[waclawek.jan]

Good question, and it could be taken broadly.

AFAIK ST never officially explained how pins enabled simultaneously to a single AF would work: INs may be ORed or ANDed together, or they may be prioritized.

IMO the first option is the most straighforward thus most likely; also, my (unintentional) experience is that an IP input which is not assigned to to any AF pin is 0.

Outputs may also be prioritized but IMO they just simply fan them out.

Unfortunately, ST's presence here is only casual and mostly informal and I don't believe they would make any binding statement in this regard. You may want to contact ST directly, through web support form or through FAE.

JW

[berendi]

I would rather not experiment with connecting several inputs together internally in an undocumented way, as far as we know it might slowly burn something out inside, and failing at the most inconvenient time.

[TZARDI]

​Hello,

All  sources are ORed before entering the timer tim_brk or tim_brk2 inputs as you can see in the figure 313 of the RM0440.

[berendi]

@TZARDI​ can you please clarify this?

Figure 313 shows only a single connection as "TIMx_BKIN from AF controller".

According to the datasheet, TIM1_BK1 can be mapped to the following pins: PA6(AF6), PA14(AF6), PA15(AF9), PB8(AF12), PB10(AF12), PB12(AF6), PC13(AF2)

What happens when one maps TIM1_BK1 to four pins in the list above? Figure 313 says nothing about it to me.

What happens in the AF controller when more than one pin is mapped to the same alternate function input? Is it documented somewhere?