internal sram read and write

[bilal]

Posted on March 25, 2013 at 08:53

hi

 

i am new to stm32f4. i want to read and write data to the internal sram (4kb). i am using mdk arm for compiling c code.

 

 

regards

 

 

[Tesla DeLorean]

Posted on March 25, 2013 at 12:54

The battery backed up regions?

I'd imagine you'd have to enable the PWR/BKP domain, and clocks (AHB1 BKPSRAMEN), and simply cast a structure or pointer to the memory region (0x40024000), then access it like you would any other memory.

You understand how to cast to fixed addresses in C, right?

uint8_t *BKPRam = (uint8_t *)0x40024000;

I don't think I'd involve the compiler with generate data for this region, but rather code the application to check it's validity, and copy in some default values. I'd use a structure to manage this space.

[Andrew Neil]

Posted on March 25, 2013 at 23:09

''i am new to stm32f4''

Do you have experience with any other microcontrollers?

 

 

Do you have experience with programming in any other environment(s)?

 

[bilal]

Posted on March 27, 2013 at 20:10

thank u clive for ur response 

i just got sram working, read and write data on sram

i have connected VBAT 3.3V cell, and using an LSI, but when i switch off the power that is controller running on VBAT, sram does not retain value

i am posting the main function of code that i picked from stm32eval project examples

void RTC_Config(void)

{

  /* Enable the PWR clock */

  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);

  /* Allow access to RTC */

  PWR_BackupAccessCmd(ENABLE);

    

#if defined (RTC_CLOCK_SOURCE_LSI)  /* LSI used as RTC source clock*/

/* The RTC Clock may varies due to LSI frequency dispersion. */

  /* Enable the LSI OSC */ 

  RCC_LSICmd(ENABLE);

  /* Wait till LSI is ready */  

  while(RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)

  {

  }

  /* Select the RTC Clock Source */

  RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);

  

  SynchPrediv = 0xFF;

  AsynchPrediv = 0x7F;

#elif defined (RTC_CLOCK_SOURCE_LSE) /* LSE used as RTC source clock */

  /* Enable the LSE OSC */

  RCC_LSEConfig(RCC_LSE_ON);

  /* Wait till LSE is ready */  

  while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)

  {

  }

  /* Select the RTC Clock Source */

  RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);

  

  SynchPrediv = 0xFF;

  AsynchPrediv = 0x7F;

#else

  #error Please select the RTC Clock source inside the main.c file

#endif /* RTC_CLOCK_SOURCE_LSI */

  

  /* Enable the RTC Clock */

  RCC_RTCCLKCmd(ENABLE);

  /* Wait for RTC APB registers synchronisation */

  RTC_WaitForSynchro();

  /* Write to the first RTC Backup Data Register */

  RTC_WriteBackupRegister(RTC_BKP_DR0, FIRST_DATA);

  /* Display the new RCC BDCR and RTC TAFCR Registers */

//  LCD_UsrLog (''RTC Reconfig \n'');

//  LCD_UsrLog (''RCC BDCR = 0x%x\n'', RCC->BDCR);

//  LCD_UsrLog (''RTC TAFCR = 0x%x\n'', RTC->TAFCR); 

  /* Set the Time */

  RTC_TimeStructure.RTC_Hours   = 0x08;

  RTC_TimeStructure.RTC_Minutes = 0x00;

  RTC_TimeStructure.RTC_Seconds = 0x00;

  /* Set the Date */

  RTC_DateStructure.RTC_Month = RTC_Month_March;

  RTC_DateStructure.RTC_Date = 0x18;  

  RTC_DateStructure.RTC_Year = 0x11; 

  RTC_DateStructure.RTC_WeekDay = RTC_Weekday_Friday; 

  /* Calendar Configuration */

  RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;

  RTC_InitStructure.RTC_SynchPrediv =  SynchPrediv;

  RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;

  RTC_Init(&RTC_InitStructure);

  

  /* Set Current Time and Date */

  RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);  

  RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure); 

  /* Configure the RTC Wakeup Clock source and Counter (Wakeup event each 1 second) */

  RTC_WakeUpClockConfig(RTC_WakeUpClock_RTCCLK_Div16);

  RTC_SetWakeUpCounter(0x7FF);

  

  /* Enable the Wakeup Interrupt */

  RTC_ITConfig(RTC_IT_WUT, ENABLE);

  /* Enable Wakeup Counter */

  RTC_WakeUpCmd(ENABLE); 

/*  Backup SRAM ***************************************************************/

  /* Enable BKPRAM Clock */

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);

  /* Write to Backup SRAM with 32-Bit Data */

  for (i = 0x0; i < 0x1000; i += 4)

  {

    *(__IO uint32_t *) (BKPSRAM_BASE + i) = i;

  }

  /* Check the written Data */

//  for (i = 0x0; i < 0x1000; i += 4)

//  {

//    if ((*(__IO uint32_t *) (BKPSRAM_BASE + i)) != i)

//    {

//      errorindex++;

//    }

  }

whereas i can see the value of sram in memory window

sram even retain the value when i load any other code, just by enabling clock

can you please tell where the issue is? are there any configuration if we connect VBAT that i missed? 

Thank you

 

[Tesla DeLorean]

Posted on March 29, 2013 at 16:44

I don't have any systems with a battery hooked up in this fashion, I typically put the system in standby to turn of the primary supply/regulator.

I think you'd want some different code paths based on whether you're cold starting, or bring a system back from a power event that doesn't require a full RTC initialization.

I might take a look at this, next week, in the context of my own boards, with respect to the (NV)RAM and how it is preserved.

[bl_it]

Posted on March 25, 2014 at 09:47

Hin 

Just happened to be reading about this in the Reference Manual RM00090 Doc

did you switch on the Backup domain Reg:-

In 5.1.2 Battery backup domain

''When the backup domain is supplied by VBAT (analog switch connected to VBAT because VDD is not present), the backup SRAM is powered by a dedicated low power regulator. Thisregulator can be ON or OFF depending whether the application needs the backup SRAM function in Standby and VBAT modes or not. The power-down of this regulator is controlled by a dedicated bit, the BRE control bit of the PWR_CSR register (see Section 5.4.3: PWR power control/status register (PWR_CSR)).''

just skimmed you code and couldn't see this being switched on. 

Cheers 

Brian L