I2S 24-bit interface, DMA data/memory alignment?

[NNagy.1]

For 24-bit I2S, should the data/memory alignment be configured to a word because it's 24-bit data on a 32-bit frame, or should it be configured to a half-word because SPIx_DR is a 16-bit register?

[Piranha]

I suggest starting to read reference manual, because it explains it pretty clearly, but you didn't even care to write your MCU part number. You cannot do 32-bit writes to 16-bit register, therefore the correct answer is the second one - two 16-bit writes.

If your MCU has it, SAI peripheral is preferred for audio protocols.

[waclawek.jan]

If this is the two-port DMA, the memory-side alignment requirement is given by the DMA itself, if the FIFO is used (i.e. not in direct mode). Read the DMA chapter in RM.

JW