I no longer can't get I2S working on a STM32H7 anymore. Need help.

[CLeo.1]

Hi guys,

I have no idea whats going on. I no longer can't get the I2S peripheral working on the STM32H753ZI.

The I2S was working.

From the last post the Tx was not working, but as I kept working on the code to get the Tx back online, now the clocks that were produced (WS, SCLK, MCLK) no longer is working. I

have no idea whats going on but every-time I keep working on the I2S more and more stop working.

I believe I need a new set of eyes to look at this as I dont see anything wrong, as I went back to old forum post, questions, very old code (THAT WAS CONFIRMED WORKING) are now no longer working.

Can please someone help me get the I2S working again. Completely lost on this.

CODE (UP TO DATE): https://pastebin.com/q2QdpKFT

• Memory is in the right region for DMA
• SPI & DMA registers reporting 0 errors
• Checked the GPIO, RCC, I2S, DMA registers are set correctly
• Used old code that was confirmed working, is no longer working

UPDATE 1: Tried using HAL to setup this thing and the behaviour is the samething.

CODE (FOR HAL): https://pastebin.com/KuP3Gf2z

[Piranha]

You are enabling the DMA streams before the SPI/I2S peripheral is even configured.

By the way...

RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN); // Useless
RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN;

There is no point in clearing single bit fields. And...

// Instead of this:
GPIOC->MODER &= ~(GPIO_MODER_MODE4);
GPIOC->MODER |= (GPIO_MODER_MODE4_AF);
 
// Use this:
uint32_t reg; // Can be reused for multiple operations.
 
reg = GPIOC->MODER & ~(GPIO_MODER_MODE4);
GPIOC->MODER = reg | (GPIO_MODER_MODE4_AF);

[CLeo.1]

@Piranha​ Oh? I read somewhere in the STM32 APP note that you should be enabling DMA before the peripheral so as soon as the peripheral is enable the DMA can start taking in request.

Update: try enabling the DMA after the I2S, nothing.

[CLeo.1]

UPDATE: I changed the MOSI pin from PA7 -> PB5 and it worked. I didnt mention but Iam using the NUCLEO STM32H753ZI, is there something configured on the hardware thats causing PA7 to go low?

[Piranha]

Check at the schematic.

https://www.st.com/en/evaluation-tools/nucleo-h753zi.html#cad-resources

By default PA7 is connected to ETH PHY.