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JAltu.1
Associate II
September 22, 2022
Solved

I'm using the STM32U575CIU microcontroller and implementing the ADC driver using LL libraries. The problem is that LDORDY bit is never set, so the ADC isn't ready to get values.

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This topic has been closed for replies.
_andreas
_andreasBest answer
Senior
September 22, 2022

You need to switch on VDDA:

// get access to PWR 
 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);
 nop();
 // switch voltage monitor on
 SET_BIT(PWR->SVMCR, PWR_SVMCR_AVM1EN);
 nop();
 // wait until ready
 while (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == 0); 
 // switch off VDDA isolation
 SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 
 // we do not need access to the PWR domain
 CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);

See RM0456

Reference manual

STM32U575/585 Arm®-based 32-bit MCUs, section 10.4.4 Independent analog peripherals supply

5 replies

_andreas
_andreasBest answer
Senior
September 22, 2022

You need to switch on VDDA:

// get access to PWR 
 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);
 nop();
 // switch voltage monitor on
 SET_BIT(PWR->SVMCR, PWR_SVMCR_AVM1EN);
 nop();
 // wait until ready
 while (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == 0); 
 // switch off VDDA isolation
 SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 
 // we do not need access to the PWR domain
 CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);

See RM0456

Reference manual

STM32U575/585 Arm®-based 32-bit MCUs, section 10.4.4 Independent analog peripherals supply

JAltu.1
JAltu.1Author
Associate II
September 22, 2022

It works! Thank you.

_andreas
Senior
September 22, 2022

Sorry,

 // switch voltage monitor off
 CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 

should have been

// switch VDDA isolation off
SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV);

_andreas
Senior
September 22, 2022

Integrated into original answer

ST Technical Moderator
September 22, 2022

Hello @JAltu.1​ and welcome to the Community :)

Is the ADC clock enabled? Are you clearing DEEPPWD? 

If possible to share your code, so that it will be easier to understand the issue.

For more details about the ADC voltage regulator enable and disable sequences, refer to the RM0456n in Section 29.4.6: ADC Deep-power-down mode (DEEPPWD) and ADC voltage regulator (ADVREGEN).

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Imen

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