I'm using STM32F411. Can its ADC sampling rate reach 40MHz? Based on what I've experienced, no matter how I set up the clock, it can't really go above 1MHz for some reason.

[LLi.11]

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[raptorhal2]

The ADC has a clock rate maximum as defined in the data sheet. Your ADC configuration determines how many clocks are used for each sample. That determines the time to convert.

If this answer doesn't suffice, show your code.

Cheers, Hal

[LLi.11]

That answered my question, thanks a lot!

[TDK]

The clock can reach 40 MHz, but the max sample rate is much much lower than the clock. Are you confusing the two?

[LLi.11]

Yes, I was confused why the actual sample rate doesn't match the clock I set up, but I think I figure it out now, thank you so much!

[Tesla DeLorean]

Typical methods to speed this up is double and triple interleaving where the "conversion" is pushed on to a different ADC after the initial sampling is made, cycling through the available converters. Throughput is then a function of the sample time rather than the entire sample+conversion time

[dlaroche]

Can you please explain this method more? I am very intrigued by the concept.