HRTIM: when to change counter enable bits?

[max42]

STM32G4 Reference Manual (RM0440) states that all of the Timer x counter enable (in HRTIM_MCR) bits “must not be changed within a minimum of 8 cycles of fHRTIM clock.” What does that mean? How can I ever set or reset them when fHRTIM is the same as my processor core clock?

 

 

[AScha.3]

After access/change you have to wait minimum 8 clocks untill you change it again.