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DDPS.1
Associate
June 7, 2022
Solved

HRTIM register update with Burst DMA doesn't work properly

The problem is as follows: When I am trying to update HRTIM master timer registers (MPER, MCMP1-4) on the STM32G474 via Burst DMA access, every data word I write into the BDMADR register gets written into two of the specified master timer registers. So the first data word gets written into MPER and MCMP1, the second into MCMP2 and MCMP3, the third into MCMP4 and whatever has the address after MCMP4 (it's not a master timer register I think), and then it repeats. I have tried manually writing into the BDMADR register, used various DMA data chunk lengths, but to no avail.

This topic has been closed for replies.
DDPS.1
DDPS.1Best answer
Associate
June 14, 2022

Hello,

I forgot to update it here because we already had a direct support ticket: The problem was caused by the APB2 being half of all the other clocks.

5 replies

ST Technical Moderator
June 14, 2022

Hello @DDPS.1​ ,

Are you using CubeMx for your application ? It will be better to share a screenshot to check your configuration, or your code if this issue is not resolved.

Have a look at this AN4539 Application note HRTIM cookbook, it may help you.

Imen

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
DDPS.1
DDPS.1AuthorBest answer
Associate
June 14, 2022

Hello,

I forgot to update it here because we already had a direct support ticket: The problem was caused by the APB2 being half of all the other clocks.

ST Technical Moderator
June 15, 2022

Glad to know the issue has been solved.

Please allow me to close this thread and thank you again for having reported the point.

Thanks

Imen

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
DDPS.1
DDPS.1Author
Associate
June 14, 2022

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Singh.Harjit
Senior
July 3, 2022

I'm not following why the APB2 prescaler being /2 would cause double writes?

I just checked the Reference Manual and the Datasheet and didn't see any requirements for clock frequency relationship between different clocks.

Looking forward to your answer and thanks in advance.