How to use two DAC channels simultaneously

[LDesa.1]

Hello,

I am using STM32F765BI MCU.

As per our requirement we have to send data on both the DAC channels simultaneously using DMA. but I could not find any API for this. There are APIs available for DAC DMA single channel only as shown below,

HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)

Is there any API or examples available for dual DAC where we can send data using DMA same like we can send using single channel?

Please help.

Regards,

Lalabhai

[Imen.D]

Hello @LDesa.1​ ,

In dual DAC channel mode, conversions could be done simultaneously.

To efficiently use the bus bandwidth in applications that require the two DAC channels at the same time, three dual registers are implemented: DHR8RD, DHR12RD and DHR12LD.

A unique register access is then required to drive both DAC channels at the same time.

For more details, you can refer to the "Dual DAC channel conversion" section in the RM0410.

Channel data transfer is performed by DMA peripheral in serial. If two requests have the same software priority level, the channel with the lowest number will get priority versus the channel with the highest number.

For example, channel 2 gets priority over channel 4.

You can refer to the "Digital-to-analog converter (DAC)" and "Direct memory access controller (DMA)" chapters in reference manual RM0410.

Imen

[waclawek.jan]

While using the dual registers as Imen outlined above is always a good idea, you still can load the two holding registers separately, and then output them at the same moment, using a common trigger (i.e. if you set DAC_CR.TSEL1 and TSEL2 to the same value, while both TEN1 and TEN2 are set).

JW

[Cmatt.11]

i found an extanded function for Dual dac output it could be useful for your purpose maybe

/**

 * @brief Set the specified data holding register value for dual DAC channel.

 * @param hdac pointer to a DAC_HandleTypeDef structure that contains

 *        the configuration information for the specified DAC.

 * @param Alignment Specifies the data alignment for dual channel DAC.

 *     This parameter can be one of the following values:

 *      DAC_ALIGN_8B_R: 8bit right data alignment selected

 *      DAC_ALIGN_12B_L: 12bit left data alignment selected

 *      DAC_ALIGN_12B_R: 12bit right data alignment selected

 * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.

 * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.

 * @note  In dual mode, a unique register access is required to write in both

 *     DAC channels at the same time.

 * @retval HAL status

 */

HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)

{

 uint32_t data;

 uint32_t tmp;

 /* Check the parameters */

 assert_param(IS_DAC_ALIGN(Alignment));

 assert_param(IS_DAC_DATA(Data1));

 assert_param(IS_DAC_DATA(Data2));

 /* Calculate and set dual DAC data holding register value */

 if (Alignment == DAC_ALIGN_8B_R)

 {

  data = ((uint32_t)Data2 << 8U) | Data1;

 }

 else

 {

  data = ((uint32_t)Data2 << 16U) | Data1;

 }

 tmp = (uint32_t)hdac->Instance;

 tmp += DAC_DHR12RD_ALIGNMENT(Alignment);

 /* Set the dual DAC selected data holding register */

 *(__IO uint32_t *)tmp = data;

 /* Return function status */

 return HAL_OK;

}