How to set stm32f407 sdio to 48Mhz?

[eittinfo]

Posted on February 25, 2017 at 17:25

hi 

i want use sdio as 8bit mode and 48Mhz but i try to do this and i saw max 25Mhz on clk line for sdio port.

how can i set sdio as 8bit-48Mhz mode?

tnx for replay

[Tesla DeLorean]

Posted on February 25, 2017 at 17:36

You'd need to use BYPASS mode to get the Q tap clock (48 MHz nominally) as the bus clock. If you use the divider the minimum setting will be DIV2

There are timing issues with the BYPASS mode (see errata), but the SDIO clock can be up to 75 MHz, assuming you don't need it for USB, or CRYPT/HASH, which would give you 37.5 MHz safely.

Bandwidth on the SDIO is more critically limited by transfer size, small block reads/writes have significant overhead.

[eittinfo]

Posted on February 25, 2017 at 18:07

tnx for your replay.

i use this code to config sdio clock

SDIO->CLKCR  = /*SDIO_CLKCR_HWFC_EN |*/ (SDIO_CLKCR_WIDBUS_0*2) | SDIO_CLKCR_PWRSAV | SDIO_CLKCR_CLKEN | (1);

i use logic analyzer to capture clk speed,with this config ,clk was around 16.6 mhz ,and if i set (0) for divide value i got around 24Mhz clk speed.

how can i disable divider?

i use usb host in my project.

[Tesla DeLorean]

Posted on February 25, 2017 at 18:32

>>

how can i disable divider?

Like I said, you'd need to use the BYPASS mode.