How to run a program bigger than 2MB on STM32F769I-DISC1 using Atollic?

[rudolf.pribis]

My compiled program could be around 50MB. I am browsing internet several days to find a way how to run it at STM32F769I-DISC1. So far I just configured SDRAM1 128MB.

My questions are:

1) Can I compile the program and in Debug mode copy it to SDRAM and run it from there using Atollic?

2) For release, can I store .HEX file in SD Card and on the start copy it to RAM and run it from there? (I saw AN5188, but it is not so clear to me even how can I run mentioned examples.)

For the background, I am trying to build IIoT device which is using OPC UA with companion specifications - therefore my program needs to be so big.

[Tesla DeLorean]

In Keil one can create a debugger script to start the SDRAM (ie configure pins, peripheral and chip) so as to download and execute content from the SDRAM.

The external loader mechanism can be used to download into QSPI (64 MB), and that also can be used, you can either step to the point your code enables the QSPI, or you can do the debugger script technique.

You could also create a simple loader model, which prompts for the main app to be sent, via X-MODEM, or whatever protocol you most favour for speed/delivery.

You could also pull a .BIN, .DFU or .HEX from an SD Card with a loader. I could build such a thing, but it would run you several hundred USD for something that builds in Keil.

Similar things can presumably be achieved in Atollic, and with GNU/GDB and OpenOCD

[rudolf.pribis]

I am doing it as a PhD project, so I do not have a big budget for licenses.

So your suggestion is to follow AN4760 chapter 4 Programming QSPI Flash memory, right?

In additional... I am still confused about functional difference between FMC and QSPI. By a chance do you have an advice for a good article?

In general, for the program load I can use QSPI Flash memory and for a dynamic memory allocation I can use SDRAM?

Thanks Rudo

[waclawek.jan]

FMC is interface for parallel memories, i.e. conventional SRAM, (NOR) FLASH (or even EPROM if you wish); then the slightly exotic versions of these memories with multiplexed address/data buses and with synchronous access; then NAND FLASH; and - as you are aware - SDRAM. It provides some automatism in hardware for handling these memories - e.g. for SDRAM, after properly configuring it, you don't have to care about the nuances of SDRAM addressing, read/write sequencing, nor refresh; from the programmer's point of view it appears simply as a read-write memory at a certain address range, which sometimes inserts some wait states to the accesses.

QSPI is interface for serial (NOR)FLASH memories. Here again the whole sequence for reads is automated in hardware so, that it appears as a read-only memory at a certain address range. Writes have to be handled "manually", though.

Code can be run from both kinds of memories, but the throughput may be influenced by the natural limitations of the memories plus the controllers. Cache in the 'F7 may mitigate some of this.

I personally don't have experience with the 'F7, FMC/SDRAM nor the QSPI interfaces. I also consider tens of megabytes of code (or data) beyond scope of microcontrollers, but hey, 20 years ago I'd say the same of hundreds of kilobytes... ;)

> I am doing it as a PhD project,

FEI?

JW

PS. If you want, come for some chat on mikrozone.sk

[rudolf.pribis]

On the end I used MT25L5G loder which comes with ST LINK and Cube Programmer.

For setting up the QSPI in memory mapped mode I found explanation here https://github.com/vlcekji2/External-Loaders/tree/master/QSPI%20Drivers.