How to interface 1Gbit Parallel NOR Flash with STM32F437?

[Srujan G L]

Posted on November 14, 2017 at 10:15

1. Hi, I have a S29GL01GS 1Gbit parallel NOR flash (26 address lines [A0-A25] & 16 data lines),if i configure the chip select to be used in Bank1 (NE1) ,it has an address range of 0x60000000 to 0x63FFFFFF,which is of 64MByte. But 1Gbit=128Mbyte so i'm able to write only half of the total memory space.I believe i'm not using the complete memory.
2. The addressing in STM32F4 is for a byte, is there a way to configure the addressing for a word(16bit).

#stm32f4-fmc

[Tesla DeLorean]

Posted on November 14, 2017 at 16:44

Yes, you can define the bus width of the FSMC bus, it won't increase the decoded region in memory, it simply shifts the address bits presented to the physical device.

For a memory larger than the 64MB decode window, you'll need to use TWO different decode regions and add glue logic to combine them at the device. ie drive the chip select as a combination of the two, and drive order address bit high or low depending on which one.

[Srujan G L]

175579CGIL2

[Tesla DeLorean]

Posted on November 16, 2017 at 16:58

You'd need to AND a pair of -CS pins to drive the chip select on the memory, then a high order address bit could be one of the selects, being either 0 or 1 depending on the bank.

Each address in the ARM is a BYTE, when you configure the STM32 FSMC in 16-bit data mode it shifts the address bus as presented at the pins, thus A[0..25] at the pins are A[1..26] internally

[Srujan G L]

Posted on November 17, 2017 at 07:18

say i write 0xAAAA to location 0x0000000

, 0xCCCC to location 0x0000001

,0xFFFF(default) in location 0x0000002

it should be saved as AAAA , CCCC

but the data is stored as 0x8888 in location 0x0000000 which is the AND of 0xAAAA and 0xCCCC.

and if i read 0x0000001 location the data that i recieve is 0xFF88

So clearly, one write operation of a 16bit word is taking two address space.

and the contradicting issue is that, i cant go beyond 0x63FFFFFF also

because of this reason

i'm stuck with only 0x00 to 0x3FFFFFF addresses and i have to make use of only these numbers to address the entire 1Gbit Flash, ''

Each address in the ARM is a BYTE

'', yea so each incremental address is pointing to a byte. which is exactly 2^26 bytes, and tats only half of the memory!!!!

[Tesla DeLorean]

Posted on November 17, 2017 at 14:05

You'd have to write 16-bit words two bytes apart

[0x60000140] = 0xAAAA

[0x60000142] = 0xCCCC

Like I said, you'd need to combine two decode regions, this would require simple external logic.