How to do ESD protection to USB_D+ and USB_D- when USBPHY is not powered for STM32U595VJT6

[Yang Yang]

Hello, ST experts

 

It is found that USB_D+&USB_D- pins(PA12&PA11) of STM32U595 in our own design are very sensitive to ESD strike. When USBPHY power is not on as reference manual said, I think it is only 3.3V tolerant in this case, but not 5V tolerant, am I right?

And in 3.3V tolerant case, what ESD protection way should do? e.g. USBLC6 can be effective?

 

Best Regards

Yang

[Gyessine]

Hello @Yang Yang 
Based on AN4899, If VDD is not present, for example grounded, the maximum voltage must not exceed 3.6 V
(the exact limit value is provided in the STM32 datasheet)
To improve the protection against high ESD surges (and then to meet the conditions requested by the standards), dedicated components have to be placed as close as possible to the receptacle (see the table below).
for more details about ESD protection you can review AN5612   and AN4879 
the recommended ESD is based on your needs:

BR
Gyessine

[Yang Yang]

Hello, Gyessine

 

It is said that PA12&PA11 will be 5V-tolerant when the USB PHY is powered on. How to set USB PHY power on?

And assume PA12&PA11 is set to 5V-tolerant, does that mean the analog switch in the below graph is open? and for the other parts, e.g. ESD diodes and the other diode,  are there any differences either in 5V tolerant mode or in 3.3V tolerant mode?

 

 

[Gyessine]

Hello @Yang Yang 
Your current question is different from your initial question.
For moderation purposes, we always try to ensure that each thread contains one specific question to help users find solutions to their current issues.
I suggest you post your new issue in a new thread. Support will be provided.
BR
Gyessine