The IWDG was developed to replace an external watchdog. For safety reasons, it must therefore have its own clock that is independent of the main clock and that works in any case - hence the name Independent Watchdog. This cannot be achieved with a crystal-based oscillator, which is why a free-running and therefore relatively imprecise RC oscillator was implemented.
It would be quite expensive and would also make it difficult to meet the security requirements if the LSI frequency were to be determined permanently and the settings of the IWDG were to be constantly changed. That is why one usually looks at the worst case and assumes the highest possible LSI frequency so that a reset is not accidentally triggered if the CPU calculates a little longer, runs in a waiting loop or something similar.
Does it answer your question?
Regards
/Peter