How DMA works in UART

[Xenon02]

Hello ! 

I've been wondering how DMA works in UART. 
I've checked some codes for example HAL_UART_Transmit_DMA(). I know it is set to sned 8 bit to peripheral. But I wondered when DMA knows that UART sent 8 bit when it is TX DMA or recevied 8 bit when it is in RX DMA. In this case it is TX. 

I've checked what HAL_UART_Transmit_DMA() does : 

 

And there was this HAL_DMA_Start_IT(). So it works that DMA sends it's data from memory to UART TX registers. Ok. So tmp is the memory we have the data, and the Instance-> DR is the register the data must be sent. 

So where exactly there is info about turning on the UART to transmit data, and when does the DMA know that UART sent 8 bit and is ready to send another 8 bits ? 

I've also noticed this : 

 

But I don't understand what it does ? It turn on the UART transmit ? 

Sorry for being to picky I was quite a bit confused due to the fact that in HAL_UART_Transmit there is a while which has a counter that sends 1 byte 

Although I don't know if it has any info back whether it has sent the data or not. It's so confusing ... There is no waiting time or anything. 

[waclawek.jan]

When UART transmiter is enabled, if the transmit buffer is empty, TXE flag is set. This flag, gated by UART_CR3.DMAT, is the request signal ("trigger") to the DMA channel. So, if DMA channel is enabled and UART_CR3.DMAT is set and TXE is set, DMA starts one transfer from memory to UART's data register. This clears TXE, so there is no more DMA transfer, until given bye in UART is transmitted when TXE is set again and the whole process repeats until DMA's count runs to 0.

Instead of Cube/HAL sources, better read the DMA and relevant portions of UART chapters in RM.

JW

[Xenon02]

So as I understand the : UART_CR3.DMAT is a setting in the hardware of DMA ? Like UART_CR3.DMAT says that DMA transmit data to TX register when UART sends TXE ?  Because I didn't understand what UART_CR3.DMAT exactly do. 
Also about counting is there any counter in the code ? And where it says the UART is enabled to transmit ? 

In the normal UART transmission 
HAL_UART_Transmit , there is some counter TxXferCounter but there is no info when to send another 8 bits or rather info that the UART finished sending 8 bits as well. There is a code that pdatabits8 is incremented but the while doesn't check if the data was sent it just goes on, like it sends data to TX without a break. 

"Instead of Cube/HAL sources, better read the DMA and relevant portions of UART chapters in RM." 

RM ? 
I've tried to understand the code as well but I got lost a bit. I don't know if the begginer is a good thing to add here as well. 

[waclawek.jan]

> RM ?

Reference Manual. You did not tell us which STM32 are you using; if it's STM32L0x3, then it's RM0367.

The proper way to learn is to read the RM and write simple experiments based on what you read there, starting with simple things like transmitting a couple of bytes (which requires to read also the RCC and GPIO chapters to be able to set up the respective Tx pin properly), experimenting with peripherals' registers in debugger (with understanding the caveats), and then add things like DMA which is basically again reading the RM and experimenting with it. Unfortunately, ST refuses to support this path by providing clean and simple register-based examples.

Clicking in CubeMX and using Cube/HAL is a shortcut where you arrive quickly at working point without really understanding what's going on in the hardware. It may work for you if you ever stick to what can be clicked CubeMX; otherwise it may get into your way more than help.

> HAL_UART_Transmit  ... while doesn't check if the data was sent it just goes on, like it sends data to TX without a break

It does wait, in UART_WaitOnFlagUntilTimeout()

> UART_CR3.DMAT says that DMA transmit data to TX register when UART sends TXE

Basically, yes.

As long as TX buffer is empty and UART transmitter is enabled, TXE is set. TXE is a signal from UART's logic (a wire), and UART_CR3.DMAT is a flip-flop which retains the value you've written to it. Output of that flip-flop and TXE are fed to an AND gate (i.e. any one of those two signals is 0, the AND's output is 0) and the output of AND is fed to DMA's input which triggers the DMA transfer.

JW

[STTwo-32]

Hello @Xenon02 

>where exactly there is info about turning on the UART to transmit data?

in the initialisation of the uart instant, we can choice to turn on or off both TX and RX. If TX is on, WE Can Do a transfert whenever TXE is set.

 

>when does the DMA know that UART sent 8 bit and is ready to send another 8 bits?

The DMA know that when TXE is set.

 

>But I don't understand what it does ?

This command enable the DMA mode for transmission.

PS: to understand more about how HAL functions work, you can use any exemple then debug the HAL function you want step by step and check the registers states every Time (refer to the product reference manual also).

Best Regards.

STTwo-32 

[Xenon02]

Hello @STTwo-32 

>in the initialisation of the uart instant, we can choice to turn on or off both TX and RX. If TX is on, WE Can Do a transfert whenever TXE is set.

Ok so in initialisation the TX is on, and the data from memory is sent to UART TX register it somehow know if the data is fully transfered to the register ? 

>The DMA know that when TXE is set. 

Is it somewhere in the code such. Like a while loop that checks this TXE or is it a hardware thing ? 

>This command enable the DMA mode for transmission. 

I still don't understand, DMA into transmition ? but it says about UART bit and not DMA bit. It's confusing. 

>PS: to understand more about how HAL functions work, you can use any exemple then debug the HAL function you want step by step and check the registers states every Time (refer to the product reference manual also).

I'll try although I don't yet know how to start with it, I am a begginer :>

[waclawek.jan]

> How does the register or something know that UART is empty to send this TX flag ?

The UART Tx hardware is basically a shift register and a counter (which counts, how many bits remain to be transmitted, i.e. at the beginning it's at 0). TXE is a flip-flop, which after enabling transmitter is set to 1. When you write a byte into the data register, TXE gets cleared. Then UART checks, if the counter is zero, and if it is, the byte gets transferred from the data register into the shift register, together with a startbit and a stopbit, and at the same time the counter is set to 2+8 (or whatever the data length is). Data register is now empty so TXE gets set to 1. If you now write another byte in to the data register, TXE gets cleared and it does not get set to 1 again until the byte is transmitted from the shift register and counter is zero. The baudrate generator clocks out the bits from the shift register and at the same time decrements the counter; as soon as counter gets to zero, baudrate generator thus transmission stops. If there is already a byte in the data register, it gets transferred to the shift register, TXE gets set, and the whole process starts again.

 

> But the DMA must be somehow configured right ? So there must be a code to configure it.

You will find all the details you need in the DMA chapter in RM. Start with reading it as I've recommended above.

 

> does DMA has to always wait for a flag to transmit a data

Yes.

 

> like it sent 32 bits now it wait for a flag ?

DMA transfers 8, 16 or 32 bit data in one transaction, depending on setting in given DMA channel's control register. Read the DMA chapter in RM.

From peripheral point of view, such transfer is the same as if you'd write from processor. Most peripherals require data of certain width, e.g. UART when set to 7 or 8 bit data requires 8-bit wide data; when set to 9 bit it requires 16-bit wide data. If UART is set to 8-bit data and you write 16 or 32 bit wide data to it, the uppermost bits simple get lost.

 

> What is the Huart and Hdma_usart handlers ?

I don't use Cube/HAL and I am not interested in it.

JW

[Xenon02]

> The UART Tx hardware is basically a shift register and a counter (which counts, how many bits remain to be transmitted, i.e. at the beginning it's at 0). TXE is a flip-flop, which after enabling transmitter is set to 1. When you write a byte into the data register, TXE gets cleared. Then UART checks, if the counter is zero, and if it is, the byte gets transferred from the data register into the shift register, together with a startbit and a stopbit, and at the same time the counter is set to 2+8 (or whatever the data length is). Data register is now empty so TXE gets set to 1. If you now write another byte in to the data register, TXE gets cleared and it does not get set to 1 again until the byte is transmitted from the shift register and counter is zero. The baudrate generator clocks out the bits from the shift register and at the same time decrements the counter; as soon as counter gets to zero, baudrate generator thus transmission stops. If there is already a byte in the data register, it gets transferred to the shift register, TXE gets set, and the whole process starts again.

Something like this ? 

But this picture is not enough. Because there must be something a logic gate to stop UART from transmiting and stops the clock ? To make sure the data is set in the shift register. Or rather I don't know if I am right but the clock must be disabled in shift register to not send data I think ? 

The TX flag is from different register I guess ? And it acts as input or as output, I wonder how. 

Don't get me wrong here, I understand the concept you have told me and as I understand UART doesn't check the counter until the TX flag is cleared. When it is cleared it checks the counter and when it's 0, it loads the data from register to shift register and I think it, and then the counter is not 0, I don't know if 8/10 number can be treated as "1" or "0" in the shift/write register. But I think that's how it would work. 

Sorry for me being very stubborn, I believe I haven't angered you, because I don't know why I have a feeling I want to understand it and it makes me a bit anxious that I don't understand it a bit when it comes to hardware in more specific way. Because usually the UART devices pictures shows only data bus and TX RX like here : 

Maybe it is in RM as you've said but I wanted to also try to ask here because in RM it is not that specific as I've checked. 

Sorry again :> 

>You will find all the details you need in the DMA chapter in RM. Start with reading it as I've recommended above.

If I don't find what I am looking for there or won't understand it should I ask it here or in new post ?
I don't want to be a problem in this forum. 

> I don't use Cube/HAL and I am not interested in it.

I am sorry if my question annoyed you. 
thanks for the help :> 

Thank you a lot JW. 

[Xenon02]

I've started reading the DMA in RM, and it is a bit confusing like this part : 

Like bits 1 and 0 of PA[31:0] are ignored ? The whole data of PA[31:0] can be 0001010011111... and it contains 0 and 1 so they are ignored :D Like whole data loaded in it is ignored. 

I can see that DMA must be first configured by CPU to even work. After configuration it will work. Like register memory configuration and peripheral configuration, channel configuration etc. So I think CPU must configure the device first so it will work from that point. CPU sends an enable I think to start the DMA after configuration. 

The picture how DMA works doesn't tell a lot : 

Like how it works exactly AHB Slave I believe is for configuration like which channel or which devices uses this DMA, and the DMA output bus I guess is to make this transfer, I wonder how it works like it know the address so it goes to that address and takes somehow the value and stores it in a register not shown in the RM ? I guess. How he searches the devices/memory like there is some logic gates for scanning already built in ? 


Sorry for many questions, if it's bothering. 

[Pavel A.]

On the picture, note the thin arrow labeled DMA request. This is signal from a peripheral to DMA that tells the DMA to move next piece of data. UART has two these request lines, for RX and TX. Every DMA-capable peripheral has these lines.  All other information (addresses of UART registers, direction of move...) you specify in the DMA channel configuration.

> How he searches the devices/memory 

Don't work (or study) too hard. Drink water, take a good nap. Then you'll understand.

[Xenon02]

> Don't work (or study) too hard. Drink water, take a good nap. Then you'll understand.

Perhaps you are right, but it's hard to find infomation about it like with UART. Usually pictures shows only data bus and RX, TX pin, but in STM or other devices there are some registers, so I tried to undestand them trying to imagine how it works in logic gates level, but it's hard and I didn't know where to find source to learn. I found out people know these stuff like it's a basic so I tried to attempt on understanding it as well, or rather tried to understand how it works in code and in hardware as well ;> Maybe it is useless dunno, just saw that people know it so I understood it might be a good idea to learn it for FPGA purposes as well. 
>On the picture, note the thin arrow labeled DMA request. This is signal from a peripheral to DMA that tells the DMA to move next piece of data. UART has two these request lines, for RX and TX. Every DMA-capable peripheral has these lines.  All other information (addresses of UART registers, direction of move...) you specify in the DMA channel configuration.

So CPU configurates the DMA for which request he has to wait, addresses ect. the UART only turns on the DMA request transmission. 

I have so many questions but maybe it is not suitible here. I will also wait for the answer from JW, most parts I guess I understood. 

Learning basics can be hard but learning how code works in the beggining is also hard ;D 

Thanks Pavel. 

[waclawek.jan]

The RM does not go to gate-level details. It's expected that you have prior knowledge of general working of basic mcu constituents such as UART and DMA, from school/courses/books or any other general electronics-related form of education. The RM then fills in the STM32-specific details.

So, I'm going to answer some of your concrete questions; but you should start seeking a more thorough introductory material, as you are not going to get a full tutorial here, we just don't have time and space for that.

---

> Something like this ?

That's a parallel-loaded shift register (sometimes also denoted as parallel-in-serial-out, or PISO); yes, that's one part of it. The other is the bit counter I've mentioned together with shift register. And of course there's a bunch of auxiliary glue logic to gate clocks, determine counter being at zero, etc.

> UART devices pictures shows only data bus and TX RX like here :

Yes. That's the same as when you talk about a building, say the Empire State Building in New York - the vast majority of public information is how it looks like from the outside; only a few people are interested in, and have seen, the blueprints according which it has been built.

 

> Like bits 1 and 0 of PA[31:0] are ignored ?

Yes, the zeroth and first bit are used as if they were zero. It means, the address is rounded down to the nearest multiple of four.

> The picture how DMA works doesn't tell a lot :

That's because again, you are looking at a block schematics of all elevators in the Empire State Building, together with the related electric power grid and the traffic distribution. You want to know how one elevator (here: channel) works, so read the description of channel-related registers at the end of the DMA chapter, and then read the functional description. It takes several re-reads, and I recommend you to try to draw yourself block schematics and charts, according to what you are reading.

JW

[Xenon02]

> So, I'm going to answer some of your concrete questions; but you should start seeking a more thorough introductory material, as you are not going to get a full tutorial here, we just don't have time and space for that. 

Understandable, where can I find these materials, recommendations ? 

>Yes. That's the same as when you talk about a building, say the Empire State Building in New York - the vast majority of public information is how it looks like from the outside; only a few people are interested in, and have seen, the blueprints according which it has been built. 

I thought that when everybody know how UART is working from logic gates then I thought it might be helpful in understanding stuffs or how to write charts etc. So I wanted to know where I can start. 

>Yes, the zeroth and first bit are used as if they were zero. It means, the address is rounded down to the nearest multiple of four.

I still don't understand it, what I understood from this : 

Is that all 32 bits in PA is ignored because it consist of 0 and 1. Because it says it ignores 1 and 0 in PA[31:0]. 
That's what I understood because it says it ignores these values in PA
>That's because again, you are looking at a block schematics of all elevators in the Empire State Building, together with the related electric power grid and the traffic distribution. You want to know how one elevator (here: channel) works, so read the description of channel-related registers at the end of the DMA chapter, and then read the functional description. It takes several re-reads, and I recommend you to try to draw yourself block schematics and charts, according to what you are reading.

I don't know how to start with it. I don't know what to achieve from DMA so hence I don't know what to start with ;D
So I should ignore how to works in logic gate way ? I thought it might be helpfull in understanding why I need to set some bits in DMA or in UART or what should be done in code and what is done in hardware without code. 
So I don't know how to start learning it, from logic gate side or from just the code but not everything is in code etc. 

> It's expected that you have prior knowledge of general working of basic mcu constituents such as UART and DMA, from school/courses/books or any other general electronics-related form of education.

I was only taught how simple things work like Adder, Half-Adder, simple multiplexer, basic operations like OR, AND, Moore machine. But the data bus or how memory works is new thing to me and I tried to learn on my own. Or how UART works in logic thing or DMA or more devices is new, or how 8 wires can send and receive data from memory, new things ;> 

Thanks JW !