Hi, I would like to know the maximum frequency input supported by STM32F031C6T6 and the total ADC error rate expected for this MCU.

[MGeor.4]

..

[waclawek.jan]

Read the datasheet, 12-bit ADC characteristics chapter.

JW

[MGeor.4]

Hi,
Thank you .Could you please comment on the maximum frequency supported.
Regards,
Minu

[Tesla DeLorean]

For the MCU or the ADC? Both should be in the Data sheet, surely?​

[S.Ma]

Considsr the timer max clock frequency to be around the logic limit. Of course timer clock can be lower frequency than io input signal... for example using an input prescaler. Or using input signal as timer clock.... that is a different question. Channels 1 and 2 to use first as more versatile.

[Nikita91]

I can't find this information in the DS or RM.

I think for input capture the limit is the timer clock frequency, or perhaps 1/2 sysclock if there is resync of the input signal.

The real question is how fast you can drain the captured data.

I rated this at 1/10 of the system clock frequency using DMA. With a 64 MHz sysclock consider 6.4M capture/sec. At 8M capture/sec some capture were missing.

This is on one channel. If there are several channels, this capture rate must be shared.