HELP: FSMC on MCBSTM32F400 Keil evaluation board

[jarno]

Posted on August 18, 2014 at 12:24

I'm using the Keil evaluation board (MCBSTM32F400) and i need help to understand how to use FSMC. There's NAND chip (MT29F4G08A) on board connected to FSMC but cannot find any examples how to use the controller with NAND flash. Anyone can help me?

Thanks.

[Tesla DeLorean]

Posted on August 18, 2014 at 17:36

[jarno]

Posted on August 19, 2014 at 12:27

Thanks Clive. Reference turned out helpful although i managed to progress a little on the subject on me own too. Now struggling with memory array addressing, using HAL vers. 1.3.0. thinking if there's a bug on memory address increment function.

with NAND memory info structure definition at header file stm32f4xx_hal_nand.h

/**

  * @brief  NAND Memory info Structure definition

  */

typedef struct

{

  uint32_t PageSize;       /*!< NAND memory page (without spare area) size measured in K. bytes */

  uint32_t SpareAreaSize;  /*!< NAND memory spare area size measured in K. bytes                */

  uint32_t BlockSize;      /*!< NAND memory block size number of pages                          */

  uint32_t BlockNbr;       /*!< NAND memory number of blocks                                    */

  uint32_t ZoneSize;       /*!< NAND memory zone size measured in number of blocks              */

}NAND_InfoTypeDef;

with very little knowledge and far less experience with NAND memories, datasheet uses words page, block, plane and device, my guess is that zone is HAL equivalent for plane, isn't it?

The NAND i'm using is organized (omitting spare areas) as page size of 2048KB, block size of 64 pages, plane size of 2048 blocks, device size of 2 planes. To info structure above i'd assign:

PageSize = 2048; // kBytes

BlockSize = 64; // blocks

BlockNbr = 4096; // 2 * 2048 blocks per plane

ZoneSize= 2048; // blocks

so what do you think is there bug on bolded line below?

uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress)

{

  uint32_t status = NAND_VALID_ADDRESS;

 

  /* Increment page address */

  pAddress->Page++;

  /* Check NAND address is valid */

  if(pAddress->Page == hnand->Info.BlockSize)

  {

    pAddress->Page = 0;

    pAddress->Block++;

    

    if(pAddress->Block == hnand->Info.ZoneSize)

    {

      pAddress->Block = 0;

      pAddress->Zone++;

      if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr))

      {

        status = NAND_INVALID_ADDRESS;

      }

    }

  }

 

  return (status);

}

Or am i wrong?

Thanks.

[Tesla DeLorean]

Posted on August 19, 2014 at 17:40

I haven't spent any time reviewing the HAL implementation, perhaps ST can provide some support/insight?