Hello, We are using an STM32L4S5, and running into an issue with the DMA that is servicing the USART2 RX FIFO. The DMA appears to be getting starved. Is there any way to monitor the bus or DMA to see why this is happening? Thanks!

[Michael Stauffer]

We are using an STM32L4S5, and running into an issue with the DMA that is servicing the USART2 RX FIFO. It appears that the USART FIFO is filling up, and the DMA is not able to keep pace. The baud rate is 460800 with hardware flow control turned on, Sys Clk = 24MHz, and PCLCK1 = 24MHz. If I reduce PLCLK1 to 12 MHz or less, the problem goes away. I've tried setting the DMA priority to high, and it doesn't change the behavior. Has anyone experienced a similar issue? Is there any way to monitor the bus or the DMA to see why it can't keep up with the UART FIFO?

[Tesla DeLorean]

Something sounds very wrong.

How large is the DMA buffer?

Not really any way to probe or trace the bus from outside.

Make sure not to have a peripheral view in the debugger of the USART register window.

Try turning off FIFO on USART and DMA