Hardware CRC on byte buffer

[trevor1]

Posted on May 08, 2009 at 10:26

Hardware CRC on byte buffer

[bob239955]

Posted on May 17, 2011 at 12:36

I am wondering if once again the documentaion is wrong and that

CRC_DR = CRC_DR + CRC_IDR

(32bit) = (32bit) + (8bit)

(where + means crc)

might be worth a try. 8-)

Otherwise whats the point of the CRC_IDR register?

[trevor1]

Posted on May 17, 2011 at 12:36

The hardware CRC works on 4 bytes at a time (CRC->DR is a 32 bit register).

How do you CRC a buffer that contains a number of bytes not divisible by 4

i.e. what do you do with the last 1, 2 or 3 bytes?

E.g.

unsigned char buffer[5] = { 1, 2, 3, 4, 5 }; // CRC ????

Regards

Trevor

[ericbrocke9]

Posted on May 17, 2011 at 12:36

Dit you see that 0x4C11DB7 is the bit-revered version of 0xEDB88320?

The implementation is common on hardware designs (fi. FPGA) but from C-code it is not. You have to bit-reverse the data before you write to the CRC_DR register. The result of the CRC calculation should be bit-reversed and negated (^ 0xFFFFFFFF).

See also

http://www.st.com/mcu/forums-cat-7171-23.html

about this subject.

It seems that there is a design flaw about the CRC calculation unit. I think that CRC_IDR register originally was intended to calculate the CRC on a single byte but they could not get it right on the implementation. It would be nice if they fix it on new devices.

[trevor1]

Posted on May 17, 2011 at 12:36

Hi bobz,

I wondered that also.

Anyway I'm not going to use the hardware CRC now as it uses the wrong polynomial -- 0x4C11DB7 and I want to use 0xEDB88320. It's a shame you cannot set the polynomial.

The reason I looked at hardware CRC was to reduce the size of my booloader i.e. not have to store the 1k CRC table in code. I got round this by generating the the CRC table in RAM rather than defining it in code.

Regards

Trevor