Associate III

Question

Hard - to catch - fault

Forum|Forum|13 years ago
June 4, 2013
24 replies
3606 views

Posted on June 04, 2013 at 09:50

Hello,

I have a kind of strange issue. When I really stress my system (it handles serial packets, get the right data, and send it via serial, I send thousands of messages without waiting for reply), in an unpredictable way, I sometimes get an invalid PC load usage fault of invalid state fault.

When I get an invalid PC load usage, the program counter is like 0x0 or 0x5, or sometimes it contains a ram address, but I don't have code in ram, and looking at the stack trace, I have the feeling there is a stack pointer corruption somewhere because some of the registers have flash address of branch code in them (and LR has weird stuff, obviously not flash code nor ram address).

Here are my stack traces :

****************************

HARD FAULT !

Stack = 0x20000660

Invalid PC load usage fault at

Program counter = 0x200082B0

Stack frame :

R0 = 0x400264B8

R1 = 0x20008318

R2 = 0x3C

R3 = 0x200082B0

R12 = 0x0

LR = 0x8002417

PC = 0x200082B0

PSR = 0x20008318

****************************

Or :

****************************

HARD FAULT !

Stack = 0x20000688

Invalid state usage fault at

Program counter = 0x20008270

Stack frame :

R0 = 0x20008288

R1 = 0x20008EA8

R2 = 0x3C

R3 = 0x200082B0

R12 = 0x0

LR = 0x20008270

PC = 0x20008270

PSR = 0x20000200

****************************

Or again:

****************************

HARD FAULT !

Stack = 0x20000670

Invalid PC load usage fault at

Program counter = 0x1

Stack frame :

R0 = 0x0

R1 = 0x80023D7

R2 = 0x8003B26

R3 = 0x21000200

R12 = 0x0

LR = 0x8003279

PC = 0x1

PSR = 0x200082B0

****************************

The problem seems to happen (tried to track it down but it's very hard) on the service call interrupt exit after a malloc call (but there is like 10000 malloc calls without problem first).

My process stacks are far from full (half empty at min), I have 8k of system stack. The hard fault happens with user stack, but again, seems to trigger when popping rgisters at service call exit.

Spent about 10 hours trying to fix this, but no luck so far, do youguys have any advice for me?

Thomas.

#dma2

This topic has been closed for replies.

rootAuthor

Associate III

Posted on June 04, 2013 at 10:27

[Update #1]

If I don't actually send the data through serial, no hard fault, I do prepare the buffer for DMA, etc, but don't trigger the DMA send, and I can ''handle'' hundreds of thousands of messages. As soon as I really enable the transmit DMA, I can get hard faults anytime. The DMAtriggers an interrupt when it ends, but even if the ISR is empty, I have hard faults (in normal condition when the DMA ends the ISR checks if there is more data to send, prepare a buffer and re-trigger a DMA). I'm already using DMA for serial reception, with ISRs, etc, and this seems to work flawlessly. I have 2 levels of interrupt pre-emption, highest is for service call and systick, the other for ISRs and PendSV (which has lowest priority):

NVIC_SetPriorityGrouping(6); // there is only 2 levels of preemption, one for system, the other for interrupts. This gives 8 levels of sub-priority for interrupts. 
NVIC_SetPriority(SVCall_IRQn, 0x00); // set service call priority to highest and preemptive 
NVIC_SetPriority(SysTick_IRQn, 0x7F); // set systick interrupt to low but preemptive 
NVIC_SetPriority(PendSV_IRQn, 0xFF); // set pend sv interrupt to low and not preemptive

Thomas.

rootAuthor

Associate III

Posted on June 04, 2013 at 10:41

[Update #2]

If I do disable the TX DMA interrupt, but still send data (using the DMA CR bit 0 to know if DMA has ended, and I can send a new buffer), then I still have hard faults.

So far it seems the transmit DMA itself is the root cause of my problems :(

Thomas.

rootAuthor

Associate III

Posted on June 04, 2013 at 11:01

Tried to lower the speed of the MCU to 40MHz ... I now have :

****************************

HARD FAULT !

Stack = 0x20000688

Imprecise data bus error.

Stack frame :

R0 = 0x100F241

R1 = 0x100F240

R2 = 0x1

R3 = 0x20008190

R12 = 0x0

LR = 0x80018BF

PC = 0x80018E8

PSR = 0x1000200

****************************

rootAuthor

Associate III

Posted on June 04, 2013 at 11:08

Had the imprecise error only once ...

****************************

HARD FAULT !

Stack = 0x20000678

Invalid PC load usage fault at

Program counter = 0x0

Stack frame :

R0 = 0x20008190

R1 = 0x2000A078

R2 = 0x20008130

R3 = 0x2000A078

R12 = 0x3C

LR = 0x20008190

PC = 0x0

PSR = 0x80031B3

****************************

HARD FAULT !

Stack = 0x20000688

Invalid state usage fault at

Program counter = 0x20008128

Stack frame :

R0 = 0x20008140

R1 = 0x20009440

R2 = 0x3C

R3 = 0x20008168

R12 = 0x0

LR = 0x20008128

PC = 0x20008128

PSR = 0x20000200

****************************

HARD FAULT !

Stack = 0x20000688

Invalid state usage fault at

Program counter = 0x20008128

Stack frame :

R0 = 0x20008168

R1 = 0x200081A8

R2 = 0x3C

R3 = 0x20008190

R12 = 0x0

LR = 0x20008128

PC = 0x20008128

PSR = 0x20000200

****************************

HARD FAULT !

Stack = 0x20000660

Invalid PC load usage fault at

Program counter = 0x20008168

Stack frame :

R0 = 0x1

R1 = 0x20009270

R2 = 0x3C

R3 = 0x20008168

R12 = 0x0

LR = 0x8002413

PC = 0x20008168

PSR = 0x20009270

****************************

HARD FAULT !

Stack = 0x20000688

Invalid state usage fault at

Program counter = 0x20008128

Stack frame :

R0 = 0x20008140

R1 = 0x20009440

R2 = 0x3C

R3 = 0x20008168

R12 = 0x0

LR = 0x20008128

PC = 0x20008128

PSR = 0x20000200

****************************

HARD FAULT !

Stack = 0x20000680

Invalid PC load usage fault at

Program counter = 0x4

Stack frame :

R0 = 0x20008140

R1 = 0x1

R2 = 0x0

R3 = 0x800103B

R12 = 0x8003B22

LR = 0x81000000

PC = 0x4

PSR = 0x20003658

****************************

HARD FAULT !

Stack = 0x20000678

Invalid PC load usage fault at

Program counter = 0x800328B

Stack frame :

R0 = 0x8003B22

R1 = 0x21000200

R2 = 0x20008140

R3 = 0x8003275

R12 = 0x1

LR = 0x20009740

PC = 0x800328B

PSR = 0x800106B

****************************

HARD FAULT !

Stack = 0x20000678

Invalid PC load usage fault at

Program counter = 0x0

Stack frame :

R0 = 0x20008168

R1 = 0x20009450

R2 = 0x20008158

R3 = 0x20009450

R12 = 0x3C

LR = 0x20008168

PC = 0x0

PSR = 0x80031B3

****************************

HARD FAULT !

Stack = 0x20000688

Invalid state usage fault at

Program counter = 0x20008168

Stack frame :

R0 = 0x20008118

R1 = 0x2000A080

R2 = 0x3C

R3 = 0x20008150

R12 = 0x0

LR = 0x20008168

PC = 0x20008168

PSR = 0x20000200

****************************

HARD FAULT !

Stack = 0x20000660

Invalid PC load usage fault at

Program counter = 0x20008168

Stack frame :

R0 = 0x2000A070

R1 = 0x2000A070

R2 = 0x3C

R3 = 0x20008168

R12 = 0x0

LR = 0x8002423

PC = 0x20008168

PSR = 0x2000A070

****************************

HARD FAULT !

Stack = 0x20000680

Invalid PC load usage fault at

Program counter = 0x7

Stack frame :

R0 = 0x20008118

R1 = 0x1

R2 = 0x0

R3 = 0x800103B

R12 = 0x8003B22

LR = 0x81000000

PC = 0x7

PSR = 0x20003658

****************************

HARD FAULT !

Stack = 0x200006A8

Invalid PC load usage fault at

Program counter = 0x0

Stack frame :

R0 = 0x80018A1

R1 = 0x20008140

R2 = 0x0

R3 = 0x0

R12 = 0x0

LR = 0x0

PC = 0x0

PSR = 0x8002A1B

****************************

HARD FAULT !

Stack = 0x20000660

Invalid PC load usage fault at

Program counter = 0x20008168

Stack frame :

R0 = 0x2000A070

R1 = 0x2000A070

R2 = 0x3C

R3 = 0x20008168

R12 = 0x0

LR = 0x8002423

PC = 0x20008168

PSR = 0x2000A070

****************************

It seems to hard fault much faster at 40MHz speed than 120MHz.

Thomas.

waclawek.jan

Super User

Posted on June 04, 2013 at 11:16

Post the code where you fill the DMA registers.

JW

rootAuthor

Associate III

Posted on June 04, 2013 at 11:56

Hello,

Here it is :

DMA2_Stream7->CR = 0x8000450; // configures DMA to memory to peripheral byte transfer 
DMA2_Stream7->PAR = (uint32_t) (&(USART1->DR)); // peripheral register is USART1 data register 
DMA2_Stream7->FCR = 5; // use FIFO with half full trigger.

Then when I triger transmit :

DMA2_Stream7->M0AR = (uint32_t)_transmitBuffer; 
DMA2_Stream7 ->NDTR = count; 
DMA2_Stream7 ->CR |= 1; // enable DMA.

Just saw anytime the transmit DMA end interrupt triggers, I have the FIFO error bit set ... I wasn't using the FIFO so I enabled it with half empty trigger (FCR = 5), nothing changed. Thomas.

rootAuthor

Associate III

Posted on June 04, 2013 at 12:12

Seems that with debugger not attached, the hard fault doesn't trigger (about 1M packets replied without it stopping) ...

Thomas.

waclawek.jan

Super User

Posted on June 04, 2013 at 12:25

Wow.

What debugger/IDE do you use?

Did you have extensive number of breakpoints set?

Did you have some ''live'' data/register displayed?

JW

rootAuthor

Associate III

Posted on June 04, 2013 at 12:25

Tried with ST Link (was using J-Link FLASHER ARM), same result, hard fault with debuger attached, no hard fault when debugger not attached (as the stack is corrupted, I wouldn't expect it to recover, plus I have a while(1) loop at the end of hard fault handler ISR).

Thomas.

rootAuthor

Associate III

Posted on June 04, 2013 at 12:41

Hello,

I'm using TASKING for ARM. I don't have any active breakpoint and the default views (they are refreshing only when process stops).

I now processed >2M packets at full speed, and still working good (J-link is physically connected but not attached).

Thomas.

Show more replies

Sign up

Login with SSO

Login to the community

Login with SSO