Skip to main content
Associate
September 10, 2023
Question

hard fault

  • September 10, 2023
  • 4 replies
  • 1702 views

Hi
I encountered a strange problem regarding HardFault .
The issue occurs when SW is running on STM32G030K8T6
BUT DOSNT OCCUR when running on STM32G031K8T6 !!!
My SW is basically a power supplyer doing the following
TIM1.4 triggers ADC -> DMA -> IRQ
TIM1.2 outputs some PWM.
From time to time- my SW manipulated the duty cycle of those timer channels.
Once every (say) 1000 calls to the manipulating function the CPU goes to HardFault_Handler.
Checking the address of the machine command prior to the HardFault call (from the stack) reviles:
The address isn’t constant- it differs by 1 command address between trials.
If I pad the code with some NOP(s)- the fault address moves to different command.
Off course: there is no memory error in any of these addresses (most of the commands are not memory related).
One may think that maybe the DMA produced a memory “error”- but the DMA controller doesn’t show any error (DMA_ISR bits TEIFn).
moreover: it doesn’t seem to be that the DMA is capable of triggering a HardFault- but rather- sets a DMA error instead.
All of this- only on STM32G030K8T6 but not on STM32G031K8T6 !!!!
Has anybody encountered such a problem?
Thanks for reading all this
YONA

This topic has been closed for replies.

4 replies

Tesla DeLorean
Guru
September 10, 2023

Prior knowledge is not required to debug..

Provide a register and code dump of the faulting situation.

If not memory perhaps math. Make sure you don't have code that might divide by zero. Check any flash wait state or prefetch settings.

Some information rather than proses will help here.

Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..
yonaAuthor
Associate
September 10, 2023

M0 dosnt have a HW devision.  FLASH wait states allready init properly (if not- would stop running at init time)

dosnt happen in STM32G031K8T6. only in STM32G030K8T6  !!!!

YONA

 

JCuna.1
Senior
September 10, 2023

Probably a unaligned access to memory. Remember cortex M0, does not support unaligned access to memory.

Tesla DeLorean
Guru
September 10, 2023

The data from the MCU's perspective would reduce the doubt or need to guess.

With Keil we do this  https://github.com/cturvey/RandomNinjaChef/blob/main/KeilHardFault.c

Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..