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dominik
Senior
February 3, 2021
Solved

HAL_SPI_TransmitReceive_DMA read before write

  • February 3, 2021
  • 4 replies
  • 1231 views

Hi

I'm using the HAL_SPI_TransmitReceive_DMA to write to an external Flash. On a delte command for the external flash I need to wait for until the busy flag of the flash is zero. So I use this function to check the busy flag.

 spi_read(&command, sizeof (command), &SPI_RX_BUFFER, 2);
 
 if ((SPI_RX_BUFFER[1] & 1) == 0)
 return true;
 else
 return false;
void spi_read(const void *txdata, size_t txsize, void *rxdata, size_t rxsize)
{
 HAL_GPIO_WritePin(Flash_NSS_GPIO_Port, Flash_NSS_Pin, GPIO_PIN_RESET);
 //reset the TX_RX complete Indication
 SPI_TXRX_Complete (true, false);
 SPI_TXRX_Status_Complete (true, false);
 
 HAL_SPI_TransmitReceive_DMA (&hspi3, (uint8_t *)txdata, (uint8_t *)rxdata, rxsize);
}

The problem is, that the RX of the DMA is not ready when I check the busy flag:

SPI_RX_BUFFER[1] & 1

How can I fix this issue?

This topic has been closed for replies.
Best answer by dominik

It's running, problem was that with high optimization debugger I got wrong and inpossible results. I changed the icf file to a bigger range ange disabled the optimization, now it works like it should.

4 replies

waclawek.jan
Super User
February 3, 2021

Observe the communication on the SPI pins using logic analyzer.

JW

dominik
dominikAuthorBest answer
Senior
February 4, 2021

It's running, problem was that with high optimization debugger I got wrong and inpossible results. I changed the icf file to a bigger range ange disabled the optimization, now it works like it should.

KnarfB
Super User
February 5, 2021

If your MCU has a data cache, the observed behaviour at high optimzation could be due to cache incoherency.

dominik
dominikAuthor
Senior
February 5, 2021

I changed my icf file to a 1 image Debug config, now I can debug without optimization