GPIO pin behavior during JTAG programming

[jeffz]

Posted on May 09, 2018 at 16:06

Hi,

this question may be hardware related. I saw some weird power ripple when I programming the STM32L4 device with JTAG. so can anyone explain what are GPIO status during JTAG programming? will it draw high current or less current compare to normal status?

Thanks,

Jeff

#jtag #stm32-l4

[AvaTar]

Posted on May 09, 2018 at 18:02

You might wait for ST staff to come up with STM32L4 specific details.

But erasing/programming of Flash definitely causes higher power consumptions.

Flash requires voltages above 9V for programming, which are generated  on-chip via switched capacitor converters. Inductivities (coils) are still hard to implement in silicon ...

Some time ago I had measured a specific low-power Microchip device, were power consumption doubled during Flash programming (8mA instead of 4mA).