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dungeonlords789
Associate III
Jan 3, 2021 6:22 PM UTC
Solved

gpio let down 5 V pull-up

I use stm32f401's PB4 (NJTRST) pin. I attached 5 V pull-up resistor (5.1k) to PB4. While MCU is in reset mode the voltage on PB4 is 4.26 V. Only after starting the system, the voltage increases to 5 V. In my program I configure PB4 as input without pull-up or pull-down, just input. I couldn't find an explanation in AN4899.

Why voltage is 4.26 while reset? Is it because of schmitt trigger?

This topic has been closed for replies.
Michal Dudka
Michal DudkaBest answer
Lead
Jan 3, 2021 8:29 PM UTC

It has nothing to do with SWD. Reference manual:

https://www.st.com/resource/en/reference_manual/dm00096844-stm32f401xb-c-and-stm32f401xd-e-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf

at page 148 in section 8.3.1 specify that

"During and just after reset ... PB4: NJTRST in pull-up"

Your pullup and internal JTAG pullup probably creating voltage divider... After startup, your code set pin from AF (JTAG function) to Input and deactivates that pullup.

6 replies

Michal Dudka
Lead
Jan 3, 2021 7:23 PM UTC

I gues that pin has during reset some JTAG function (NJRST), after startup is pin reconfigured from to desired mode...

dungeonlords789
Associate III
Jan 3, 2021 7:32 PM UTC

I use SWD only.

Michal Dudka
Michal DudkaBest answer
Lead
Jan 3, 2021 8:29 PM UTC

It has nothing to do with SWD. Reference manual:

https://www.st.com/resource/en/reference_manual/dm00096844-stm32f401xb-c-and-stm32f401xd-e-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf

at page 148 in section 8.3.1 specify that

"During and just after reset ... PB4: NJTRST in pull-up"

Your pullup and internal JTAG pullup probably creating voltage divider... After startup, your code set pin from AF (JTAG function) to Input and deactivates that pullup.

TDK
Jan 3, 2021 8:33 PM UTC

Just to clarify, "reset mode" means VDD/VDDA is still powered, but NRST is held low?

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