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Associate II
May 21, 2024
Solved

GPIO going to zero in STOP3 Mode even if connected with internal pull-up STM32U5A5

  • May 21, 2024
  • 1 reply
  • 1136 views

Hello,

I'm developing an application on the NUCLEO-U5A5ZJ-Q. I need some pins to stay high while the microcontroller is in Stop3 mode.

The Datasheet suggests to use internal pull ups, because the GPIO peripheral is not active in Stop3 mode. For this reason, I have configured the GPIO as input and with internal pull-up before entering Stop3 mode.

I've used the following functions:

 

 

 LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_6, GPIO_PULLUP); 
 LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_6, LL_GPIO_MODE_INPUT);

 

It works and the pin stays high. However, whenever the microcontroller go into Stop3 mode, the GPIO voltage goes to zero.

Any Idea? Am I missing something?

Thank you in Advance

Best answer by Sarra.S

Hello @gianmarco.cerutti

Please check whether the APC bit in the PWR_APCR register is setAccording to RM, the I/O state in stop3 mode is determined by this bit

If the APC bit is set, the I/Os can be configured either with a pull-up (see PWR_PUCRx registers), or with a pull-down (see PWR_PDCRx registers), or can be kept in an analog state if none of the PWR_PUCRx or PWR_PDCRx register is set.

1 reply

Sarra.SBest answer
ST Employee
May 21, 2024

Hello @gianmarco.cerutti

Please check whether the APC bit in the PWR_APCR register is setAccording to RM, the I/O state in stop3 mode is determined by this bit

If the APC bit is set, the I/Os can be configured either with a pull-up (see PWR_PUCRx registers), or with a pull-down (see PWR_PDCRx registers), or can be kept in an analog state if none of the PWR_PUCRx or PWR_PDCRx register is set.

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Associate II
May 22, 2024

Thank you for your answer.

Yes the problem was not configuring the Pull Up through the PWR_PUCRx register but through the GPIO peripheral.

I write here a snippet of code that worked for me.

 

	SET_BIT(PWR->APCR, PWR_APCR_APC);
	HAL_PWREx_EnableGPIOPullUp(PWR_GPIO_C, GREEN_LED_Pin);

Best Regards

Visitor II
June 27, 2024

From what I can tell this is the only way for a GPIO to remain SET when the core enters into STOP3 mode. Can anyone confirm?