Full duplex USART example for STM32F722

[David Pekin]

Posted on February 15, 2018 at 15:52

Hello.

Ive worked with the two boards comm DMA sample program and it works but it only works half duplex.

The flow is:

Init UART handle,

Transmit dma 

wait for tx interupt callback

reinitalize UART handle

Recieve dma 

wait for rx interrupt callback

loop back to top 

That sequence can be called over and over and it works.  But, if you only initiialize the UART handle at the beginning, it does not work.  You can make multiple transmit calls that work but calling receive dma after transmit (after waiting for tx callback) does not.

Does anyone have sample code for interrupt driven full duplex DMA UART tx & rx?

thanks

[Tesla DeLorean]

Posted on February 15, 2018 at 16:52

For the business case you'd really want to get with the FAE supporting your account, and push ST to provide clear examples, and debug common use cases for the HAL.

Reinitialization suggests a failure to clear internal states. Pay attention to error/status thrown by the library in these situations, and report those where dysfunction can be established.

https://community.st.com/0D50X00009XkePTSAZ

Related threads of evolving topic

https://community.st.com/0D50X00009XkWuASAV

https://community.st.com/0D50X00009XkWu9SAF

[David Pekin]

Posted on February 15, 2018 at 20:41

Thanks.  I'll need to track down an FE but I would have thought this would be a pretty universally common way to want to drive a UART - interrupt/DMA.  Should be a no brainer...   

But, considering deadlines, I might instantiate a second UART that does TX only since the system seems to be OK with doing DMA transmits after DMA transmit.  I'll use the RX side of UART1 1 and the TX side of UART 2 to the driver chip....  Seems like a basackward way of getting full duplex!     

Unfortunately, bringing up the 2nd UART has it's own challenges....

[Tesla DeLorean]

Posted on February 16, 2018 at 02:16

>>

Should be a no brainer...   

You'd think, but the HAL is a thick abstraction that frequently gets in its own way. Hardware is more than capable of walking and juggling at the same time.

[BShar]

I am trying to use USART3 with TX and RX DMA (stream3 and stream1). I can set TX buffer as RX buffer and have the characters loop back; but they don't seem to "stick" in SRAM. What may be happening?

[Tesla DeLorean]

Cache coherency?

What memory address is the buffer located?

Can you use DTCM memory?

[BShar]

DMA1_Stream1->M0AR = 0x2001 1850

maps to SRAM1; is that a problem?

[Tesla DeLorean]

It means you're going to have to manage the coherency issues of the CPU (cache/buffers) and Memory holding different content. Usually via DCache clean and invalidate functions.

Not familiar with these issues? Review the ENABLE_SD_DMA_CACHE_MAINTENANCE implementation here

STM32Cube_FW_F7_V1.9.0\Middlewares\Third_Party\FatFs\src\drivers\sd_diskio_dma_template.c